Quality enhancement of reconfigurable multichip module systems by redundant utilization

This paper evaluates the quality-effectiveness of the utilization of redundancy in reconfigurable MCM (RMCM) systems. Due to the reconfigurability, a RMCM system can implement a device with different redundancy. Redundancy is determined by the requirement of the fault-tolerance (FT) of the device under implementation which is achieved by the feature of reconfigurability. No previous work has shown the effect of utilization of redundancy on quality-level (QL). In this paper, the tolerance to escaping from testing is introduced and referred to as the escape tolerance (ET). This can be achieved by utilizing a certain amount of redundancy and is studied by evaluating its effect on QL of RMCM under different amount of redundancy. Also, it is shown that the coverage of testing (FC) is improved by reconfiguration through numerical analysis. Hence, we derive the QL by relating the QL to the yield enhancement by reconfiguration; the effect of interconnection yield; the effect of ET to the QL; and the improvement in FC by reconfiguration. In the proposed approaches, appropriate combinatorial models are formulated to take into account parameters related to the redundancy and reconfiguration processes in RMCM systems. From extensive parametric results, a is shown that there exists a bound in the effectiveness of redundant utilization (i.e. the amount of redundancy) depending on the value of the RMCM yield and FC. Using the proposed approaches, redundant utilization of RMCM systems can be appropriately used to enhance the QL.

[1]  Tsuyoshi Isshiki,et al.  A silicon-on-silicon field programmable multichip module (FPMCM) integrating FPGA and MCM technologies , 1995 .

[2]  Patrick Juola,et al.  An approach for the yield enhancement of programmable gate arrays , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[3]  Dennis McCarty.  System development using Actel field programmable gate arrays , 1990, Digest of Papers Compcon Spring '90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage.

[4]  Fabrizio Lombardi,et al.  Modeling quality reduction of multichip module systems due to uneven fault-coverage and imperfect diagnosis , 1996, Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

[5]  J. Darnauer,et al.  A field programmable multi-chip module (FPMCM) , 1994, Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines.

[6]  Nippon Telegraph.  Multichip modules: next-generation packages Reduced delays between ch@, simplified power distribution, and enhanced dissipation capabilities are among the advantages of assembling and encapsulating dice on substrates , 1990 .

[7]  Fabrizio Lombardi,et al.  Stratified testing of multichip module systems under uneven known-good-yield , 1999, Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99).

[8]  R. M. Lea,et al.  Reducing cost and ensuring on-time delivery of hybrid-WSI massively parallel computing modules , 1994, Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI).

[9]  Francesco Corsi,et al.  Defect level as a function of fault coverage and yield , 1993, Proceedings ETC 93 Third European Test Conference.

[10]  B. Kleveland,et al.  Peripheral circuit design for field programmable MCM systems , 1992, Proceedings 1992 IEEE Multi-Chip Module Conference MCMC-92.

[11]  R. J. Wagner,et al.  High-yield assembly of multichip modules through known-good IC's and effective test strategies , 1992, Proc. IEEE.

[12]  Andrew M. Tyrrell,et al.  The yield enhancement of field-programmable gate arrays , 1994, IEEE Trans. Very Large Scale Integr. Syst..