论文信息 - The design of low power multiple-valued logic encoder and decoder circuits

The design of low power multiple-valued logic encoder and decoder circuits

Novel multiple-valued logic (MVL) voltage-mode circuits, namely encoder and decoder circuits, using both enhancement- and depletion-mode MOSFETs, are introduced. High performance and low power dissipation, due to zero-static power consumption during their steady-state operation, characterize the proposed circuits. More specifically, considering quaternary logic, and 0.7 /spl mu/m technology, the encoder and decoder circuits are implemented and simulated by the SPICE tool. The results obtained show substantial improvements, in terms of power, speed, and transistor count, compared with existing designs.

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