Online Inertia-Based Temperature Estimation for Reliability Enhancement

[1]  Jung Ho Ahn,et al.  McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

[2]  Israel Koren,et al.  A Study on the Use of Performance Counters to Estimate Power in Microprocessors , 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.

[3]  Sung Woo Chung,et al.  Using On-Chip Event Counters For High-Resolution, Real-Time Temperature Measurement , 2006, Thermal and Thermomechanical Proceedings 10th Intersociety Conference on Phenomena in Electronics Systems, 2006. ITHERM 2006..

[4]  Kevin Skadron,et al.  Using performance counters for runtime temperature sensing in high-performance processors , 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

[5]  Kevin Skadron,et al.  Predictive Temperature-Aware DVFS , 2010, IEEE Transactions on Computers.

[6]  Tajana Simunic,et al.  Proactive temperature management in MPSoCs , 2008, Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08).

[7]  Wayne P. Burleson,et al.  Calibration of on-chip thermal sensors using process monitoring circuits , 2010, 2010 11th International Symposium on Quality Electronic Design (ISQED).

[8]  William Fornaciari,et al.  HANDS: heterogeneous architectures and networks-on-chip design and simulation , 2012, ISLPED '12.

[9]  Israel Koren,et al.  Sustainable Computing: Informatics and Systems , 2011 .

[10]  Chen-Yong Cher,et al.  An information-theoretic framework for optimal temperature sensor allocation and full-chip thermal monitoring , 2012, DAC Design Automation Conference 2012.

[11]  Kevin Skadron,et al.  Interconnect lifetime prediction under dynamic stress for reliability-aware design , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

[12]  Jose Renau,et al.  Power model validation through thermal measurements , 2007, ISCA '07.

[13]  Geoff V. Merrett,et al.  Adaptive and Hierarchical Runtime Manager for Energy-Aware Thermal Management of Embedded Systems , 2016, ACM Trans. Embed. Comput. Syst..

[14]  Tajana Simunic,et al.  An analytical model for the upper bound on temperature differences on a chip , 2008, GLSVLSI '08.

[15]  Margaret Martonosi,et al.  Runtime power monitoring in high-end processors: methodology and empirical data , 2003, Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36..

[16]  David H. Albonesi,et al.  Localized microarchitecture-level voltage management , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[17]  Sally A. McKee,et al.  Prediction-based power estimation and scheduling for CMPs , 2009, ICS '09.

[18]  Petru Eles,et al.  On-line thermal aware dynamic voltage scaling for energy optimization with frequency/temperature dependency consideration , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[19]  Johan A. K. Suykens,et al.  Training multilayer perceptron classifiers based on a modified support vector method , 1999, IEEE Trans. Neural Networks.

[20]  Frank Bellosa,et al.  Task activity vectors: a new metric for temperature-aware scheduling , 2008, Eurosys '08.

[21]  José Antonio Lozano,et al.  Sensitivity Analysis of k-Fold Cross Validation in Prediction Error Estimation , 2010, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[22]  Somayeh Sardashti,et al.  The gem5 simulator , 2011, CARN.

[23]  Jose Renau,et al.  Characterizing processor thermal behavior , 2010, ASPLOS 2010.