A Markovian, variation-aware circuit-level aging model

Accurate age modeling, and fast, yet robust reliability sign-off emerged as mandatory constraints in integrated circuits (ICs) design for advanced process technology nodes. This paper proposes a Markovian framework to asses and predict the IC lifetime by taking into account the joint effects of process, environmental, and temporal variations. By allowing the performance boundary to vary in time such that both remnant and non remnant variations are encompassed, and imposing a Markovian evolution, we propose a model that can be better fitted to various real conditions, thus enabling at design-time appropriate guardbands selection and effective aging mitigation/compensation techniques. The proposed framework has been validated for different stress conditions, under process variations and aging effects. Experimental results indicate an approximation error with mean value smaller than 10% and a standard deviation smaller than 15% for the considered circuit predicted end-of-life (EOL).

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