A 24-GHz CMOS front-end

This paper reports the first 24-GHz CMOS front-end in a 0.18-/spl mu/m process. It consists of a low-noise amplifier (LNA) and a mixer and downconverts an RF input at 24 GHz to an IF of 5 GHz. It has a power gain of 27.5 dB and an overall noise figure of 7.7 dB with an input return loss, S/sub 11/ of -21 dB consuming 20 mA from a 1.5-V supply. The LNA achieves a power gain of 15 dB and a noise figure of 6 dB on 16 mA of dc current. The LNA's input stage utilizes a common-gate with resistive feedthrough topology. The performance analysis of this topology predicts the experimental results with good accuracy.

[1]  Jacques C. Rudell,et al.  A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications , 1997, IEEE J. Solid State Circuits.

[2]  P. Leroux,et al.  A 0.8 dB NF ESD-protected 9 mW CMOS LNA , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[3]  H.R. Rategh,et al.  A 5-GHz CMOS wireless LAN receiver front end , 2000, IEEE Journal of Solid-State Circuits.

[4]  A. Ziel Noise in solid state devices and circuits , 1986 .

[5]  Chenming Hu,et al.  A simple subcircuit extension of the BSIM3v3 model for CMOS RF design , 2000, IEEE Journal of Solid-State Circuits.

[6]  H. Hashemi,et al.  A fully integrated 24 GHz 8-path phased-array receiver in silicon , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

[7]  Asad A. Abidi,et al.  A 1 GHz CMOS RF front-end IC for a direct-conversion wireless receiver , 1996, IEEE J. Solid State Circuits.

[8]  Thomas H. Lee,et al.  The design and implementation of low-power CMOS radio receivers , 1999 .

[9]  M. Biyani,et al.  3 V low noise amplifier implemented using a 0.8 /spl mu/m CMOS process with three metal layers for 900 MHz operation , 1996 .

[10]  Hossein Hashemi,et al.  Concurrent multiband low-noise amplifiers-theory, design, and applications , 2002 .

[11]  Yuan Taur,et al.  A 23.8-GHz SOI CMOS tuned amplifier , 2002 .

[12]  T.H. Lee,et al.  A 1.5 V, 1.5 GHz CMOS low noise amplifier , 1996, 1996 Symposium on VLSI Circuits. Digest of Technical Papers.

[13]  References , 1971 .

[14]  K.O. Kenneth,et al.  A 15-GHz wireless interconnect implemented in a 0.18-/spl mu/m CMOS technology using integrated transmitters, receivers, and antennas , 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).

[15]  A.A. Abidi,et al.  A 4.5-mW 900-MHz CMOS receiver for wireless paging , 2000, IEEE Journal of Solid-State Circuits.

[16]  A. Hajimiri,et al.  A 24GHz CMOS front-end , 2002, Proceedings of the 28th European Solid-State Circuits Conference.

[17]  David B. Rutledge,et al.  A 24-GHz Patch Array with a Power Amplifier/Low-Noise Amplifier MMIC , 2002 .

[18]  B. Razavi,et al.  A 900 MHz/1.8 GHz CMOS receiver for dual band applications , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[19]  Siavash M. Alamouti,et al.  A simple transmit diversity technique for wireless communications , 1998, IEEE J. Sel. Areas Commun..