On Evolutionary Synthesis of Linear Transforms in FPGA

In this paper, an evolutionary approach is used to design multiple constant multipliers (MCMs). As these circuits can be composed of adders, subtractors and shifters, they perform a linear transform. An important consequence is that only a single input value is sufficient to completely evaluate a candidate circuit independently of its size and the bit width of the datapath. Proposed method is able to compete with well-optimized heuristics in particular problem instances. This paper also deals with a hardware acceleration of the method in FPGA which provides the speedup of two orders of magnitude in comparison with a conventional PC.

[1]  Kenji Toda,et al.  Real-world applications of analog and digital evolvable hardware , 1999, IEEE Trans. Evol. Comput..

[2]  Takafumi Aoki,et al.  Evolutionary Synthesis of Arithmetic Circuit Structures , 2003, Artificial Intelligence Review.

[3]  Lukás Sekanina.  Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware , 2003, ICES.

[4]  Richard J. Carter,et al.  A High-Performance, Pipelined, FPGA-Based Genetic Algorithm Machine , 2001, Genetic Programming and Evolvable Machines.

[5]  Tughrul Arslan,et al.  2003 NASA/DoD Conference on Evolvable Hardware , 2002, NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings..

[6]  Hitoshi Iba,et al.  Evolvable hardware , 1994 .

[7]  Takafumi Aoki,et al.  Multiplier block synthesis using evolutionary graph generation , 2004, Proceedings. 2004 NASA/DoD Conference on Evolvable Hardware, 2004..

[8]  Zdenek Kotásek,et al.  Automatic discovery of RTL benchmark circuits with predefined testability properties , 2005, 2005 NASA/DoD Conference on Evolvable Hardware (EH'05).

[9]  Roberto Rossi,et al.  An Evolutionary Approach to Automatic Generation of VHDL Code for Low-Power Digital Filters , 2001, EuroGP.

[10]  Uwe Meyer-Baese.  Digital Signal Processing with Field Programmable Gate Arrays (Signals and Communication Technology) , 2004 .

[11]  Uwe Meyer-Baese.  Digital Signal Processing with Field Programmable Gate Arrays , 2001 .

[12]  Sanyou Zeng,et al.  Evolvable Systems: From Biology to Hardware, 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings , 2007, ICES.

[13]  Markus Püschel,et al.  Multiplierless multiple constant multiplication , 2007, TALG.

[14]  D. Eppstein.  Foreword to special issue on SODA 2002 , 2007, TALG.

[15]  Julian Francis Miller,et al.  Principles in the Evolutionary Design of Digital Circuits—Part II , 2000, Genetic Programming and Evolvable Machines.

[16]  Tughrul Arslan,et al.  Evolutionary design and adaptation of high performance digital filters within an embedded reconfigurable fault tolerant hardware platform , 2004, Soft Comput..