Grouping variables into multiport memories for ASIC data path synthesis

Grouping variables into multiport memories is an essential step for multiport memory based data path synthesis. The proposed system, GMD, not only groups variables into a minimum number of multiport memory modules, but also simultaneously minimizes the number of registers in each memory module. The minimization problem is formulated as a 0-1 integer linear programming (ILP) problem. Experiments on benchmarks are promising.<<ETX>>

[1]  Shuichi Kato,et al.  A flexible multiport RAM compiler for data path , 1991 .

[2]  J. Matsunaga,et al.  Large memory embedded ASICs , 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.

[3]  Akihiro Hashimoto,et al.  Wire routing by optimizing channel assignment within large apertures , 1971, DAC.

[4]  Chien-In Henry Chen.  Allocation of multiport memory with ports of different type in register transfer level synthesis , 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[5]  Takao Nishitani,et al.  A microprogrammable real-time video signal processor (VSP) for motion compensation , 1988 .

[6]  Steve McGeady.  The i960CA SuperScalar implementation of the 80960 architecture , 1990, Digest of Papers Compcon Spring '90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage.

[7]  Gerald E. Sobelman,et al.  Singleport/multiport memory synthesis in data path design , 1990, IEEE International Symposium on Circuits and Systems.

[8]  Arun K. Majumdar,et al.  Allocation of multiport memories in data path synthesis , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[9]  Pierre G. Paulin,et al.  Scheduling and Binding Algorithms for High-Level Synthesis , 1989, 26th ACM/IEEE Design Automation Conference.

[10]  Imtiaz Ahmad,et al.  Post-processor for data path synthesis using multiport memories , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[11]  Arun K. Majumdar,et al.  Optimal allocation of multiport memories in datapath synthesis , 1989, Proceedings of the 32nd Midwest Symposium on Circuits and Systems,.

[12]  Gregory F. Grohoski,et al.  Machine Organization of the IBM RISC System/6000 Processor , 1990, IBM J. Res. Dev..

[13]  J. Yamada,et al.  Pipelined, time-sharing access technique for an integrated multiport memory , 1991 .

[14]  H. H. Hana,et al.  High speed multi-port static RAM silicon compiler , 1989, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference.

[15]  R. Gordon,et al.  An N-bus datapath compiler for IC design , 1989, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference.