A Low-Voltage Sampling Switch with Improved Linearity

A novel high linear sampling switch suitable for low-voltage operation is proposed. It not only eliminates the nonlinearity introduced by the gate-source voltage variation, but also reduces the nonlinearity resulting from the threshold voltage variation which is not solved in the earlier low-voltage sampling switch. This is achieved by adopting a replica transistor which has the same threshold voltage as the sampling transistor. The effectiveness of this technique has been demonstrated by a prototype design of a sampling switch in 0.35 mum. Simulations show that the sampling switch has a more constant on-conductance and a significant higher SFDR. This method is especially useful for low-voltage, high resolution ADCs, which is one of the hot topics nowadays

[1]  Andreas Kaiser,et al.  Input switch configuration suitable for rail-to-rail operation of switched-opamp circuits , 1999 .

[2]  David H. Robertson,et al.  Cascaded sigma-delta pipelien A/D converter with 1.25 MHz signal bandwidth and 89 DB SNR , 1999 .

[3]  Paul R. Gray,et al.  A 1.5 V, 10-bit, 14 MS/s CMOS pipeline analog-to-digital converter , 1998, 1998 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.98CH36215).

[4]  P. Gray,et al.  A 1 . 5V , 10-bit , 14 . 3-MS / s CMOS Pipeline Analog-to-Digital Converter , 1999 .

[5]  G. Ferri,et al.  A rail-to-rail constant-g/sub m/ low-voltage CMOS operational transconductance amplifier , 1997 .

[6]  H. Grubin.  The physics of semiconductor devices , 1979, IEEE Journal of Quantum Electronics.

[7]  Michiel Steyaert,et al.  Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages , 1994, IEEE J. Solid State Circuits.

[8]  J. F. Duque-Carrillo,et al.  Biasing circuit for high input swing operational amplifiers , 1995 .

[9]  Akira Matsuzawa.  Low-voltage and low-power circuit design for mixed analog/digital systems in portable equipment , 1994 .

[10]  R.R. Troutman,et al.  VLSI limitations from drain-induced barrier lowering , 1979, IEEE Transactions on Electron Devices.

[11]  Gerard Sou,et al.  1.3 V single-stage CMOS opamp , 1998 .

[12]  Mohamed A. Y. Abdulla,et al.  Distortion Analysis in Analog Integrated Circuits , 2002 .

[13]  Willy Sansen,et al.  A fully differential 1.5 V low-power CMOS operational amplifier with a rail-to-rail current-regulated constant-g/sub m/ input stage , 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

[14]  Todd L. Brooks,et al.  A cascaded sigma-delta pipeline A/D converter with 1.25 MHz signal bandwidth and 89 dB SNR , 1997 .

[15]  Jesper Steensgaard,et al.  Bootstrapped low-voltage analog switches , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[16]  Piet Wambacq,et al.  Distortion analysis of analog integrated circuits , 1998 .

[17]  P. R. Gray,et al.  A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter , 1999, IEEE J. Solid State Circuits.