ULSI memory for multimedia applications

At the beginning of the 21st century, 1 Gb DRAMs will be in practical use, and sufficient in terms of memory capacity for most memory application systems. The key technologies for multimedia systems include data compression, communication, storage, and human interfaces. Image data processing, ATM switch, and microprocessor in multimedia applications require the high data transfer rate from several 100 Mbits/s to Tbits/s. Storage systems, on the other hand, require the reduction of the price per bit to less than 10 cents/Mbytes. Application specific design approaches towards a system-on-chip are strongly needed for ULSI memories in the multimedia era.

[1]  Yoshihiro Fujita,et al.  A 3.84 GIPS integrated memory array processor with 64 processing elements and a 2-Mb SRAM , 1994, IEEE J. Solid State Circuits.

[2]  Y. Matsumoto,et al.  A CMOS 2.4 Gbps 16×16 ATM switch chip set , 1994 .

[3]  Hisashi Kodama,et al.  A video DSP with a macroblock-level-pipeline and a SIMD type vector-pipeline architecture for MPEG2 CODEC , 1994 .

[4]  Hiroshi Takada,et al.  A 3.3 V single-power-supply 64 Mb flash memory with dynamic bit-line latch (DBL) programming scheme , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

[5]  Masashi Horiguchi,et al.  256 Mb DRAM technologies for file applications , 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[6]  Yoshihiro Fujita,et al.  FA 15.2: A 3.84GIPS Integrated Memory Array Processor LSI with 64 Processing Elements and 2Mb SRAM , 1992 .

[7]  S. Ishimoto,et al.  A 256K dual port memory , 1985, 1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[8]  David A. Patterson,et al.  Computer Architecture: A Quantitative Approach , 1969 .

[9]  Yoshinobu Nakagome,et al.  3-D CG Media Chip : An Experimental Single-Chip Architecture for Three-Dimensional Computer Graphics (Special Issue on Multimedia, Analog and Processing LSIs) , 1994 .

[10]  Akihiko Sugiyama,et al.  A new implementation of the Silicon Audio Player based on an MPEG/audio decoder LSI , 1997 .

[11]  Kenji Maeguchi,et al.  A single-chip MPEG2 video decoder LSI , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.