Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates
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[1] Lukás Fujcik,et al. REPOMO32 - New reconfigurable polymorphic integrated circuit for adaptive hardware , 2009, 2009 IEEE Workshop on Evolvable and Adaptive Hardware.
[2] M. Karnaugh. The map method for synthesis of combinational logic circuits , 1953, Transactions of the American Institute of Electrical Engineers, Part I: Communication and Electronics.
[3] Shimon Peter Vingron. Switching Theory: Insight Through Predicate Logic , 2010 .
[4] Adrian Stoica,et al. Polymorphic Electronics , 2001, ICES.
[5] Julian Francis Miller,et al. Cartesian genetic programming , 2010, GECCO.
[6] Lukás Sekanina. Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware , 2003, ICES.
[7] Ulrich Nageldinger,et al. Coarse-grained reconfigurable architecture design space exploration , 2001 .
[8] Adrian Stoica,et al. Multifunctional Logic Gate Controlled by Temperature , 2005 .
[9] Zbysek Gajda. Evoluční přístup k syntéze a optimalizaci běžných a polymorfních obvodů ; Evolutionary Approach to Synthesis and Optimization of Ordinary and Polymorphic Circuits , 2011 .
[10] K. Iniewski,et al. Nanoelectronic Device Applications Handbook , 2014 .
[11] Hassan Raza,et al. Graphene Nanoelectronics: Metrology, Synthesis, Properties and Applications , 2012 .
[12] Lukás Sekanina,et al. On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits , 2011, J. Multiple Valued Log. Soft Comput..
[13] Don Cherepacha,et al. DP-FPGA: An FPGA Architecture Optimized for Datapaths , 1996, VLSI Design.