On the Design of a Reconfigurable Radio Processor Using FPGA

[1]  A. Sinha,et al.  A novel architecture of a re-configurable parallel DSP processor , 2005, The 3rd International IEEE-NEWCAS Conference, 2005..

[2]  Robert Tappan Morris,et al.  Dynamic physical layers for wireless networks using software radio , 2001, 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221).

[3]  J. DeGroat,et al.  Synthesizing FPGA Digital Modules for Software Defined Radio , 2008, 2008 IEEE National Aerospace and Electronics Conference.

[4]  Amitabha Sinha,et al.  An FPGA Based Architecture of a Novel Reconfigurable Radio Processor for Software Defined Radio , 2009, 2009 International Conference on Education Technology and Computer.