Building of VHDL Reusable Components for DSP: Oriented Architectures

In recent years, the hardware description languages, and the standard VHDL in particular, are intensively used to describe different aspects of hardware designs. The rapid development of CAD tools on the language basis have sped up and improved the design process considerably. The design methods, however, have not kept the pace with the needs and requirements for design productivity and quality. The main reason of this is a steady increase of the complexity of electronic systems and the need to decrease the time to market. The system complexity, for example, rose around 50% in 1995, whereas the design productivity was left behind with 21% increase. It is predicted that growing of the so-called “productivity gap” will remain for the future [Lehmann et al., 1996]. Consequently, alternative design methods must be found to further reduce of the development time and increase the design quality.

[1]  Peter J. Ashenden,et al.  The Designer's Guide to VHDL , 1995 .

[2]  Renate Henftling,et al.  A reuse scenario for the VHDL-based hardware design flow , 1995, Proceedings of EURO-DAC. European Design Automation Conference.

[3]  Frank Vahid,et al.  A transformation for integrating VHDL behavioral specification with synthesis and software generation , 1994, EURO-DAC '94.

[4]  Paul Bassett.  The theory and practice of adaptive reuse , 1997, SSR '97.

[5]  Dieter Monjau,et al.  Object-oriented high-level modeling of system components for the generation of VHDL code , 1995, Proceedings of EURO-DAC. European Design Automation Conference.

[6]  Václav Rajlich,et al.  Evolution and Reuse of Orthogonal Architecture , 1996, IEEE Trans. Software Eng..

[7]  Judith Benzakki,et al.  Object oriented extensions to VHDL, the LaMI proposal , 1997 .

[8]  Hong Ding,et al.  VHDL based design methodology for hierarchy and component re-use , 1995, Proceedings of EURO-DAC. European Design Automation Conference.

[9]  Jeffrey S. Poulin,et al.  Populating software repositories: Incentives and domain-specific software , 1995, J. Syst. Softw..

[10]  Petru Eles,et al.  System Synthesis with VHDL , 1997 .

[11]  Carlos Delgado Kloos,et al.  Hardware Description Languages and their Applications , 1997, IFIP — The International Federation for Information Processing.