Cryogenic etching of nano-scale silicon trenches with resist masks

Cryogenic silicon etching using SF"6-O"2 at the sub-50 nm scale has been developed for nano-electromechanical systems (NEMS) and nano-photonics systems where high aspect ratio trenches are desired. It was found that the SF"6-O"2 chemistry at cryogenic temperatures (-100 to -130^oC) provides the best combination of etch rate, selectivity, and profile control for the smallest trenches etched. The profile can be well controlled with aspect ratios on the order of 8:1 for 20nm wide trenches. The various etch parameter trends will be discussed along with methods to achieve the optimal profiles and etch rates.

[1]  Remi Dussart,et al.  Silicon columnar microstructures induced by an SF6/O2 plasma , 2005 .

[2]  A. Scherer,et al.  Techniques of Cryogenic Reactive Ion Etching in Silicon for Fabrication of Sensors , 2009 .

[3]  F. Grangeon,et al.  Profile control of high aspect ratio trenches of silicon. I. Effect of process parameters on local bowing , 2002 .

[4]  Remco J. Wiegerink,et al.  RIE lag in high aspect ratio trench etching of silicon , 1997 .

[5]  Kazunori Tsujimoto,et al.  Low‐temperature reactive ion etching and microwave plasma etching of silicon , 1988 .

[6]  Ivo W. Rangelow,et al.  Critical tasks in high aspect ratio silicon dry etching for microelectromechanical systems , 2003 .

[7]  M. D. de Boer,et al.  Black silicon method X: a review on high speed and selective plasma etching of silicon with profile control: an in-depth comparison between Bosch and cryostat DRIE processes as a roadmap to next generation equipment , 2009 .

[8]  Miko Elwenspoek,et al.  Guidelines for etching silicon MEMS structures using fluorine high-density plasmas at cryogenic temperatures , 2002 .

[9]  Erik H. Anderson,et al.  High resolution inductively coupled plasma etching of 30 nm lines and spaces in tungsten and silicon , 2000 .

[10]  M. Lemme,et al.  Silicon etch process options for micro- and nanotechnology using inductively coupled plasmas , 2006 .

[11]  S. Cabrini,et al.  Step and repeat UV nanoimprint lithography on pre-spin coated resist film: a promising route for fabricating nanodevices. , 2010, Nanotechnology.

[12]  Characterization of reactive ion etch lag scaling , 2001 .

[13]  A Scherer,et al.  Alumina etch masks for fabrication of high-aspect-ratio silicon micropillars and nanopillars , 2009, Nanotechnology.

[14]  Remi Dussart,et al.  SiOxFy passivation layer in silicon cryoetching , 2005 .