Low-power adiabatic sequential circuits with complementary pass-transistor logic

This paper presents low-power complementary pass-transistor adiabatic logic (CPAL) using two-phase power-clocks instead of four-phase ones. The two-phase CPAL uses complementary pass-transistor logic for evaluation and transmission gates for energy-recovery. It is more suitable for design of flip-flops and sequential circuits, as it uses fewer transistors than conventional CMOS transmission gate-based implementations and other adiabatic logic circuits such as 2N-2N2P. Adiabatic flip-flops (D, T and JK) based on the two-phase CPAL are introduced. A practical sequential system realized with the proposed adiabatic flip-flops is demonstrated. SPICE simulations show that the two-phase CPAL flip-flops consume less power than 2N-2N2P and CMOS implementation.

[1]  Jianping Hu,et al.  A Lower-Power Register File Based on Complementary Pass-Transistor Adiabatic Logic , 2005, IEICE Trans. Inf. Syst..

[2]  K. W. Ng,et al.  Low power flip-flop design based on PAL-2N structure , 2000 .

[3]  Ali Afzali-Kusha,et al.  Efficient power clock generation for adiabatic logic , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[4]  Kazuo Yano,et al.  A 3.8-ns CMOS 16*16-b multiplier using complementary pass-transistor logic , 1990 .

[5]  Chulwoo Kim,et al.  Low-power adiabatic computing with NMOS energy recovery logic , 2000 .

[6]  N. Tzartzanis,et al.  A resonant signal driver for two-phase, almost-non-overlapping clocks , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[7]  Deog-Kyoon Jeong,et al.  An efficient charge recovery logic circuit , 1996, IEEE J. Solid State Circuits.

[8]  John S. Denker,et al.  2nd order adiabatic computation with 2N-2P and 2N-2N2P logic circuits , 1995, ISLPED '95.

[9]  Yinshui Xia,et al.  Complementary pass-transistor adiabatic logic and sequential circuits using three-phase power supply , 2004, The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04..

[10]  Liu Xiao,et al.  A new type of low-power adiabatic circuit with complementary pass-transistor logic , 2003, ASICON 2003.

[11]  K. T. Lau,et al.  Pass-transistor adiabatic logic with NMOS pull-down configuration , 1998 .

[12]  Soo-Ik Chae,et al.  A 16-bit carry-lookahead adder using reversible energy recovery logic for ultra-low-energy systems , 1999 .