Modulation of the workfunction of Ni fully silicided gates by doping: dielectric and silicide phase effects

A systematic study of the modulation of the workfunction (WF) of Ni fully silicided gates by doping is presented, comparing the effects of dopants (Al, B, undoped, P, and As) on the WF for different dielectrics (SiO/sub 2/ versus HfSiON) and silicide phases (NiSi, Ni/sub 2/Si and Ni/sub 31/Si/sub 12/). Dual thickness series (HfSiON/SiO/sub 2/) were used to extract accurate WF values accounting for charge effects on HfSiON. While a WF modulation in the range of /spl sim/0.4 V was obtained for NiSi on SiO/sub 2/ comparing As, P, and B doped and undoped devices, negligible modulation was obtained for NiSi on HfSiON (/spl les/50 mV) suggesting Fermi-level pinning, and for the Ni-rich silicides on SiO/sub 2/ (/spl les/100 mV). Dopant pileup at the dielectric interface, believed to be responsible for the NiSi/SiO/sub 2/ WF modulation, was, however, observed for both NiSi and Ni-rich silicides. In contrast the WF of Ni-rich silicides on SiO/sub 2/ can be modulated with Al, suggesting a different mechanism of WF tuning for Al compared to B, P, and As.

[1]  G. Pourtois,et al.  First-principle calculations on gate/dielectric interfaces: on the origin of work function shifts , 2005 .

[2]  M.-R. Lin,et al.  Transistors with dual work function metal gates by single full silicidation (FUSI) of polysilicon gates , 2002, Digest. International Electron Devices Meeting,.

[3]  M. Ieong,et al.  Threshold voltage control in NiSi-gated MOSFETs through silicidation induced impurity segregation (SIIS) , 2003, IEEE International Electron Devices Meeting 2003.

[4]  D. Kwong,et al.  Dual work function metal gates using full nickel silicidation of doped poly-Si , 2003, IEEE Electron Device Letters.

[5]  C. Cabral,et al.  Interfacial segregation of dopants in fully silicided metal-oxide-semiconductor gates , 2005 .

[6]  J. Kittl,et al.  Mechanisms of arsenic segregation to the Ni2Si/SiO2 interface during Ni2Si formation , 2005 .

[7]  J. Kedzierski,et al.  Dual workfunction fully silicided metal gates , 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

[8]  Toru Tatsumi,et al.  Dual workfunction Ni-Silicide/HfSiON gate stacks by phase-controlled full-silicidation (PC-FUSI) technique for 45nm-node LSTP and LOP devices , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

[9]  Y. Akasaka,et al.  High performance metal gate MOSFETs fabricated by CMP for 0.1 /spl mu/m regime , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

[10]  T. Chiarella,et al.  Scalability of Ni FUSI gate processes: phase and Vt control to 30 nm gate lengths , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

[11]  Y.H. Kim,et al.  A capacitance-based methodology for work function extraction of metals on high-/spl kappa/ , 2004, IEEE Electron Device Letters.

[12]  S. Samavedam,et al.  Fermi level pinning at the polySi/metal oxide interface , 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).