VHDL Modeling of Fast Dynamic Reconfiguration on Novel Multicontext RAM-based Field Programmable Devices

We describe in this paper how VHDL greatly helps in modeling the dynamic reconfiguration of a novel Field Programmable Device (FPD) and the applications especially suitable for it. This dynamic reconfiguration methodology is based on multicontext operation, that is, having several copies of the configuration memory controlling the programmable features of the device. Configuration dynamic management is carried out by an onchip microprocessor. We model all these interface operations programmable hardware, configuration memory and internal microprocessor with behavioral VHDL benches acting over the configuration signals on achitecturally described VHDL blocks. We also describe how a novel analysis and synthesis tool could be written to map general purpose applications on dynamically reconfigurable arrays like the one we present.