Precise Worst-Case Execution Time Analysis for Processors with Timing Anomalies
暂无分享,去创建一个
[1] Raimund Kirner,et al. Classification of WCET analysis techniques , 2005, Eighth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'05).
[2] Stephan Thesing,et al. Safe and precise WCET determination by abstract interpretation of pipeline models , 2004 .
[3] Henrik Theiling,et al. Reliable and Precise WCET Determination for a Real-Life Processor , 2001, EMSOFT.
[4] Frank Müller,et al. Timing Analysis for Instruction Caches , 2000, Real-Time Systems.
[5] Per Stenström,et al. Timing anomalies in dynamically scheduled microprocessors , 1999, Proceedings 20th IEEE Real-Time Systems Symposium (Cat. No.99CB37054).
[6] Christine Rochange. Code padding to Improve the WCET Calculability , 2006 .
[7] Albrecht Kadlec,et al. Worst-Case Execution Time Analysis for Processors showing Timing Anomalies ⁄ , 2011 .
[8] Bernd Becker,et al. Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis , 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.
[9] Jörn Schneider. Combined schedulability and WCET analysis for real-time operating systems , 2000 .
[10] Peter P. Puschner,et al. Computing Maximum Task Execution Times — A Graph-Based Approach , 2004, Real-Time Systems.
[11] Bernd Becker,et al. A Definition and Classification of Timing Anomalies , 2006, WCET.
[12] WilhelmReinhard,et al. The worst-case execution-time problemoverview of methods and survey of tools , 2008 .
[13] Jakob Engblom,et al. The worst-case execution-time problem—overview of methods and survey of tools , 2008, TECS.
[14] Raimund Kirner,et al. Obstacles in Worst-Case Execution Time Analysis , 2008, 2008 11th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC).
[15] Ronald L. Graham,et al. Bounds on Multiprocessing Timing Anomalies , 1969, SIAM Journal of Applied Mathematics.
[16] Christoph Berg. PLRU Cache Domino Effects , 2006, WCET.
[17] Sharad Malik,et al. Efficient microarchitecture modeling and path analysis for real-time software , 1995, Proceedings 16th IEEE Real-Time Systems Symposium.
[18] Raimund Kirner,et al. Principles of timing anomalies in superscalar processors , 2005, Fifth International Conference on Quality Software (QSIC'05).