REAL-TIME CONTROL STRUCTURES FOR BLOCK DIAGRAM SCHEMATA

Block diagram schemata model computation systems in the context of an external environment. The environment imposes various constraints on the real-time performance of any implementation of a block diagram schema. The model is used to provide precise definitions of real-time performance. The portion of the implementation that affects the real-time performance is called the control structure. This research investigates several strategies for synthesizing control structures to satisfy the external real-time specifications. The simplest strategy is to execute all the blocks in the diagram in some fixed order. Control structures of this type have been somewhat ignored for time critical applications. The synthesis problem is shown to be solvable in the sense that acyclic control structures do not need to be considered. A branch-and-bound synthesis algorithm is presented which requires exponential time in the worst case. Although no efficient synthesis algorithm was found, the conjecture that the problem is NP-complete is not proved. The other strategy for implementing control structures makes use of the fact that in some applications the input values change at discrete times. Under this assumption, block diagram schemata are similar to traditional models of real-time tasks is presented that guarantees the real-time specifications will be met. This algorithm relaxes previous restrictions of the deadline for a task being coincident with its next request. Finally, some of the issues involved with multiple processor control structures are discussed, although no specific algorithms are investigated. {AD A061-122}