论文信息 - An offset self-correction sample and hold circuit for precise applications in low voltage CMOS

An offset self-correction sample and hold circuit for precise applications in low voltage CMOS

This work describes a new topology for CMOS sample-and-hold circuits, in low voltage, with self-correction of the offset voltage caused by mismatches in the differential input pair of the operational amplifier. The charge injection of the NMOS switches is an important factor and it is minimized in this topology. The results were obtained using the ACCUSIM II simulator on the AMS CMOS 0.8 /spl mu/m CYE and they reveal the circuit has a reduced error of just 0.03% at the output.

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