Distributed Low-Voltage System for the Front End of the HADES Timing RPC Wall
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M. Traxler | V. Stankova | D. Gonzalez-Diaz | D. Belver | P. Cabanelas | A. Gil | W. Koenig | E. Castro | J. Diaz | J.A. Garzon
[1] A. Blanco,et al. A new front-end electronics chain for timing RPCs , 2000, 2000 IEEE Nuclear Science Symposium. Conference Record (Cat. No.00CH37149).
[3] Jim Williams. Minimizing switching regulator residue in linear regulator outputs: Banishing those accursed spikes , 2005 .
[4] M. Traxler,et al. The Front-End Electronics for the HADES RPC Wall (ESTRELA-FEE) , 2006 .
[5] Carmen Sousa,et al. The HADES RPC inner TOF wall , 2009 .
[6] Ken Kundert. Power Supply Noise Reduction , 2006 .
[7] P. Salabura,et al. A General Purpose Trigger and Readout Board for HADES and FAIR-Experiments , 2007, IEEE Transactions on Nuclear Science.
[8] J. Mousa,et al. Probing of in-medium hadron structure with HADES , 2005 .
[9] A. Tarantola,et al. In-beam measurements of the HADES-TOF RPC wall , 2009 .