Understanding radiation effects in SRAM-based field programmable gate arrays for implementing instrumentation and control systems of nuclear power plants

Abstract Field programmable gate arrays (FPGAs) are getting more attention in safety-related and safety-critical application development of nuclear power plant instrumentation and control systems. The high logic density and advancements in architectural features make static random access memory (SRAM)-based FPGAs suitable for complex design implementations. Devices deployed in the nuclear environment face radiation particle strike that causes transient and permanent failures. The major reasons for failures are total ionization dose effects, displacement damage dose effects, and single event effects. Different from the case of space applications, soft errors are the major concern in terrestrial applications. In this article, a review of radiation effects on FPGAs is presented, especially soft errors in SRAM-based FPGAs. Single event upset (SEU) shows a high probability of error in the dependable application development in FPGAs. This survey covers the main sources of radiation and its effects on FPGAs, with emphasis on SEUs as well as on the measurement of radiation upset sensitivity and irradiation experimental results at various facilities. This article also presents a comparison between the major SEU mitigation techniques in the configuration memory and user logics of SRAM-based FPGAs.

[1]  Narayanan Vijaykrishnan,et al.  Improving soft-error tolerance of FPGA configuration bits , 2004, ICCAD 2004.

[2]  Yu Hu,et al.  IPR: In-Place Reconfiguration for FPGA fault tolerance , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

[3]  H.J. Barnaby,et al.  Total-Ionizing-Dose Effects in Modern CMOS Technologies , 2006, IEEE Transactions on Nuclear Science.

[4]  G. C. Messenger,et al.  The effects of radiation on electronic systems , 1986 .

[5]  Aiman H. El-Maleh,et al.  A finite state machine based fault tolerance technique for sequential circuits , 2014, Microelectron. Reliab..

[6]  Marty R. Shaneyfelt,et al.  Impact of technology trends on SEU in CMOS SRAMs , 1996 .

[7]  Morteza Saheb Zamani,et al.  Mitigating soft errors in SRAM-based FPGAs by decoding configuration bits in switch boxes , 2011, Microelectron. J..

[8]  Adrian Stoica,et al.  Design of a single event upset (SEU) mitigation technique for programmable devices , 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

[9]  V. K. Agrawal,et al.  Implementation of bistcontroller for fault detection in CLB of FPGA , 2012, 2012 International Conference on Devices, Circuits and Systems (ICDCS).

[10]  Mariusz Rawski,et al.  FSM implementation in embedded memory blocks of programmable logic devices using functional decomposition , 2002, Proceedings. International Conference on Information Technology: Coding and Computing.

[11]  G. M. Swift,et al.  An experimental survey of heavy ion induced dielectric rupture in Actel field programmable gate arrays (FPGAs) , 1995 .

[12]  T. P. Ma,et al.  Ionizing radiation effects in MOS devices and circuits , 1989 .

[13]  Fernanda Gusmão de Lima Kastensmidt,et al.  Evaluating one-hot encoding finite state machines for SEU reliability in SRAM-based FPGAs , 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

[14]  Dhiraj K. Pradhan,et al.  Soft Error Mitigation in Switch Modules of SRAM-based FPGAs , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[15]  Russell Tessier,et al.  FPGA Architecture: Survey and Challenges , 2008, Found. Trends Electron. Des. Autom..

[16]  Dinesh K. Anvekar,et al.  Modeling of Short Channel MOSFET Devices and Analysis of Design Aspects for Power Optimisation , 2013 .

[17]  Anurag Tiwari,et al.  Saving power by mapping finite-state machines into embedded memory blocks in FPGAs , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[18]  Ricardo Reis,et al.  Soft error rate in SRAM-based FPGAs under neutron-induced and TID effects , 2014, 2014 15th Latin American Test Workshop - LATW.

[19]  Yang Wei-we,et al.  A Review on , 2008 .

[20]  Christoforos N. Hadjicostis,et al.  Finite-state machine embeddings for non-concurrent error detection and identification , 2003, 42nd IEEE International Conference on Decision and Control (IEEE Cat. No.03CH37475).

[21]  J A Dennis.  Neutron flux and energy measurements. , 1966, Physics in medicine and biology.

[22]  Kenneth F. Galloway,et al.  A conceptual model of a single-event gate-rupture in power MOSFETs , 1993 .

[23]  F. Novak,et al.  SEU Recovery Mechanism for SRAM-Based FPGAs , 2012, IEEE Transactions on Nuclear Science.

[24]  J. V. Osborn,et al.  Total-dose tolerance of the commercial Taiwan Semiconductor Manufacturing Company (TSMC) 0.35-/spl mu/m CMOS process , 2001, 2001 IEEE Radiation Effects Data Workshop. NSREC 2001. Workshop Record. Held in conjunction with IEEE Nuclear and Space Radiation Effects Conference (Cat. No.01TH8588).

[25]  Donatella Sciuto,et al.  Design of VHDL-based totally self-checking finite-state machine and data-path descriptions , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[26]  Yu Hu,et al.  IPF: In-Place X-Filling to Mitigate Soft Errors in SRAM-Based FPGAs , 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

[27]  Lei He,et al.  In-place decomposition for robustness in FPGA , 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[28]  C. Detcheverry,et al.  SEU critical charge and sensitive area in a submicron CMOS technology , 1997 .

[29]  H.T. Weaver,et al.  RAM cell recovery mechanisms following high-energy ion strikes , 1987, IEEE Electron Device Letters.

[30]  B. Narasimham,et al.  Characterization of Digital Single Event Transient Pulse-Widths in 130-nm and 90-nm CMOS Technologies , 2007, IEEE Transactions on Nuclear Science.

[31]  R. Chipana,et al.  TID in Flash-Based FPGA: Power Supply-Current Rise and Logic Function Mapping Effects in Propagation-Delay Degradation , 2011, IEEE Transactions on Nuclear Science.

[32]  peixiong zhao,et al.  Radiation effects at low electric fields in thermal, SIMOX, and bipolar-base oxides , 1996 .

[33]  C. Carmichael,et al.  SEU mitigation testing of Xilinx Virtex II FPGAs , 2003, 2003 IEEE Radiation Effects Data Workshop.

[34]  R.D. Schrimpf,et al.  Single event transient pulse widths in digital microcircuits , 2004, IEEE Transactions on Nuclear Science.

[35]  L. D. Edmonds,et al.  A simple estimate of funneling-assisted charge collection , 1991 .

[36]  V. Kamakoti,et al.  Detecting SEU-caused routing errors in SRAM-based FPGAs , 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

[37]  T. R. Oldham,et al.  Charge Funneling in N- and P-Type Si Substrates , 1982, IEEE Transactions on Nuclear Science.

[38]  S. Pontarelli,et al.  A New Hardware/Software Platform and a New 1/E Neutron Source for Soft Error Studies: Testing FPGAs at the ISIS Facility , 2007, IEEE Transactions on Nuclear Science.

[39]  Luigi Carro,et al.  Evaluating Neutron Induced SEE in SRAM-Based FPGA Protected by Hardware- and Software-Based Fault Tolerant Techniques , 2013, IEEE Transactions on Nuclear Science.

[40]  Michael Nicolaidis,et al.  Soft Errors in Modern Electronic Systems , 2010 .

[41]  P. S. Winokur,et al.  Post irradiation effects (PIE) in integrated circuits (CMOS) , 1991 .

[42]  Andrea Domenici,et al.  SRAM-Based FPGA Systems for Safety-Critical Applications: A Survey on Design Standards and Proposed Methodologies , 2015, Journal of Computer Science and Technology.

[43]  Régis Leveugle,et al.  Analysis and comparison of fault tolerant FSM architecture based on SEC codes , 1993, Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems.

[44]  Diana Marculescu,et al.  Clock skew scheduling for soft-error-tolerant sequential circuits , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[45]  M. Lopez-Vallejo,et al.  Design Techniques for Xilinx Virtex FPGA Configuration Memory Scrubbers , 2013, IEEE Transactions on Nuclear Science.

[46]  R. Koga,et al.  The Impact of Radiation-Induced Failure Mechanisms in Electronic Components on System Reliability , 2007, IEEE Transactions on Nuclear Science.

[47]  Heather M. Quinn,et al.  A Test Methodology for Determining Space Readiness of Xilinx SRAM-Based FPGA Devices and Designs , 2009, IEEE Transactions on Instrumentation and Measurement.

[48]  E. Fuller,et al.  RADIATION CHARACTERIZATION, AND SEU MITIGATION, OF THE VIRTEX FPGA FOR SPACE-BASED RECONFIGURABLE COMPUTING , 2000 .

[49]  Francis G. Wolff,et al.  Interactive presentation: A new asymmetric SRAM cell to reduce soft errors and leakage power in FPGA , 2007 .

[50]  Andrew Holmes-Siedle,et al.  Handbook of Radiation Effects , 1993 .

[51]  P. S. Winokur,et al.  Predicting CMOS Inverter Response in Nuclear and Space Environments , 1983, IEEE Transactions on Nuclear Science.

[52]  R. C. Hughes.  Charge-Carrier Transport Phenomena in Amorphous SiO 2 : Direct Measurement of the Drift Mobility and Lifetime , 1973 .

[53]  Diana Marculescu,et al.  Soft error rate reduction using redundancy addition and removal , 2008, 2008 Asia and South Pacific Design Automation Conference.

[54]  A. Krasniewski.  Concurrent Error Detection for FSMs Designed for Implementation with Embedded Memory Blocks of FPGAs , 2007 .

[55]  Nand Kumar,et al.  Automated FSM Error Correction for Single Event Upsets , 2004 .

[56]  A. Lesea,et al.  Effectiveness of Internal Versus External SEU Scrubbing Mitigation Strategies in a Xilinx FPGA: Design, Test, and Analysis , 2008, IEEE Transactions on Nuclear Science.

[57]  J. S. Browning,et al.  Total dose characterization of a CMOS technology at high dose rates and temperatures , 1988 .

[58]  Luigi Carro,et al.  Designing fault tolerant systems into SRAM-based FPGAs , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[59]  Morteza Saheb Zamani,et al.  A Switch Box Architecture to Mitigate Bridging and Short Faults in SRAM-Based FPGAs , 2010, 2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems.

[60]  M. Caffrey,et al.  Evaluating TMR Techniques in the Presence of Single Event Upsets , 2003 .

[61]  Kenneth A. LaBel,et al.  A Robust Strategy for Total Ionizing Dose Testing of Field Programmable Gate Arrays , 2012 .

[62]  Kenneth F. Galloway,et al.  Analytical Model for Single Event Burnout of Power MOSFETs , 1987, IEEE Transactions on Nuclear Science.

[63]  F. W. Sexton,et al.  Critical charge concepts for CMOS SRAMs , 1995 .

[64]  P. Dyreklev,et al.  Neutron single event upsets in SRAM-based FPGAs , 1998, 1998 IEEE Radiation Effects Data Workshop. NSREC 98. Workshop Record. Held in conjunction with IEEE Nuclear and Space Radiation Effects Conference (Cat. No.98TH8385).

[65]  Diana Marculescu,et al.  Power-aware soft error hardening via selective voltage scaling , 2008, 2008 IEEE International Conference on Computer Design.

[66]  B. Djezzar,et al.  Channel length impact on radiation-induced threshold voltage shift in N-MOSFET devices at low gamma rays radiation doses , 1999 .

[67]  Farokh Irom,et al.  Heavy Ion Induced Single-Event Latchup Screening of Integrated Circuits Using Commercial Off-the-Shelf Evaluation Boards , 2016, 2016 IEEE Radiation Effects Data Workshop (REDW).

[68]  Arvind Kumar,et al.  Three-dimensional integrated circuits , 2006, IBM J. Res. Dev..

[69]  R. Koga,et al.  Single event functional interrupt (SEFI) sensitivity in microcircuits , 1997, RADECS 97. Fourth European Conference on Radiation and its Effects on Components and Systems (Cat. No.97TH8294).

[70]  T. Jayanthi,et al.  Dependable system design with soft error mitigation techniques in SRAM based FPGAs , 2017, 2017 Innovations in Power and Advanced Computing Technologies (i-PACT).

[71]  Nathaniel Anson Dodds,et al.  Single event latchup: Hardening strategies, triggering mechanisms, and testing considerations , 2012 .

[72]  H. T. Weaver.  Soft error stability of p-well versus n-well CMOS latches derived from 2-D transient simulations , 1988, Technical Digest., International Electron Devices Meeting.

[73]  Dariusz Makowski,et al.  The impact of radiation on electronic devices with the special consideration of neutron and gamma radiation monitoring , 2007 .

[74]  Sophie Duzellier,et al.  Radiation effects on electronic devices in space , 2005 .

[75]  Heather M. Quinn,et al.  Terrestrial-based radiation upsets: a cautionary tale , 2005, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05).

[76]  Anurag Tiwari,et al.  Enhanced reliability of finite-state machines in FPGA through efficient fault detection and correction , 2005, IEEE Transactions on Reliability.

[77]  Daniel M. Fleetwood,et al.  Effects of device scaling and geometry on MOS radiation hardness assurance , 1993 .

[78]  C. L. Axness,et al.  Mechanisms Leading to Single Event Upset , 1986, IEEE Transactions on Nuclear Science.

[79]  J. Zoutendyk,et al.  Characterization of multiple-bit errors from single-ion tracks in integrated circuits , 1989 .

[80]  Gianluca Traversi,et al.  Comparison of ionizing radiation effects in 0.18 and 0.25 /spl mu/m CMOS technologies for analog applications , 2003 .

[81]  M. Simons.  Rapid annealing in irradiated CMOS transistors , 1974 .

[82]  Lei He,et al.  SEU fault evaluation and characteristics for SRAM-based FPGA architectures and synthesis algorithms , 2013, TODE.

[83]  T. Jayanthi,et al.  A Review on SEU Mitigation Techniques for FPGA Configuration Memory , 2018 .

[84]  Lloyd W. Massengill,et al.  Basic mechanisms and modeling of single-event upset in digital microelectronics , 2003 .

[85]  Sudeb Dasgupta,et al.  Radiation Effects in MOS-based Devices and Circuits: A Review , 2011 .

[86]  Charles E. Barnes,et al.  POST IRRADIATION EFFECTS (PIE) IN INTEGRATED CIRCUITS LES EFFETS POSTERIEURS D'IRRADIATION (EPI) DANS LES CIRCUITS INTI~GRES , 1992 .

[87]  B. Todd,et al.  Radiation Risks and Mitigation in Electronic Systems , 2015 .

[88]  James E. Turner,et al.  Atoms, Radiation, and Radiation Protection , 1996 .