An architecture supporting hard real-time computing

Abstract Efforts to develop a real-time computing architecture based on a deadline-driven dataflow machine and the hardware implementation of the architecture as a network of resource-adequate simple processors (S-processors) are described. This is done on two levels of abstraction: First, the architecture is presented as a whole, using the dataflow paradigm and a high-level visual language to describe the structure and the principle of implementation-detail-free programming. Secondly, on a technical level, the design of a single S-processor is given, including its reduced instruction set, which allows for a complete and convenient implementation of real-time algorithms, especially in distributed systems, without losing operational determinism. In a third step, the gap between the two levels of abstraction is closed by mapping the dataflow functions onto the S-processor's instruction set. The advantage of a real-time system based on the resource-adequate S-processor architecture is that it is simple enough for proper validation, but allows the implementation of real-time algorithms without any limitations. In the limit of one single process per processor it requires that each dataflow graph is analysed for realisability, which means that no effort is to be spent on analysing the schedulability for temporal correctness.