Dynamic power supply current testing: a new test technology for CMOS circuits

In this thesis, we propose a new method for testing digital CMOS circuits. Our new test method is based upon detecting defects by analyzing the switching behavior of the circuit under test. It is shown that the switching behavior of the circuit offers a great deal of information that could be used to detect defects. As a window of observability, we use the dynamic power supply current response as indicative of circuit switching. In this thesis, we will show correlations between the dynamic power supply current and a variety of defects such as pattern sensitivity in SRAMs and open defects. We will also develop requirements for current-testability which involve new Design-For-Test methods which can be used to reduce the number of escaping defective parts and improve the quality of VLSI circuits.