论文信息 - Ultra low power four-quadrant multiplier/two-quadrant divider circuit using FGMOS

Ultra low power four-quadrant multiplier/two-quadrant divider circuit using FGMOS

This paper presents a novel ultra low power wide-range four-quadrant multiplier/two-quadrant divider circuit. The proposed circuit is implemented using floating gate MOS (FGMOS) devices operating in weak inversion. The wide range is achieved by means of a predistortion technique based on having different input capacitances in the FGMOS transistors. The circuit compares favourably to other ultra low power multiplier/divider circuits. The multiplier/divider can operate under a 0.9 V supply voltage with a power consumption of 87 nW in a 0.35 mum AMS technology.

E. Rodriguez-Villegas | I. Alam

[1] Esther Rodríguez-Villegas,et al. An ultra-low power analogue directionality system for digital hearing aids , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[2] Cheng-Chieh Chang,et al. Weak inversion four-quadrant multiplier and two-quadrant divider , 1998 .

[3] Bradley A. Minch,et al. Synthesis of static and dynamic multiple-input translinear element networks , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[4] Esther Rodriguez-Villegas,et al. Solution to trapped charge in FGMOS transistors , 2003 .

[5] E. Rodriguez-Villegas,et al. A 1.25-V micropower Gm-C filter based on FGMOS transistors operating in weak inversion , 2004, IEEE Journal of Solid-State Circuits.

[6] E. Rodriguez-Villegas,et al. A 1-V micropower log-domain integrator based on FGMOS transistors operating in weak inversion , 2004, IEEE Journal of Solid-State Circuits.