TAO: Techniques for Algorithm-Level Obfuscation during High-Level Synthesis
暂无分享,去创建一个
Ramesh Karri | Siddharth Garg | Francesco Regazzoni | Christian Pilato | R. Karri | F. Regazzoni | C. Pilato | S. Garg
[1] Jarrod A. Roy,et al. Ending Piracy of Integrated Circuits , 2010, Computer.
[2] Keshab K. Parhi,et al. Obfuscating DSP Circuits via High-Level Transformations , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[3] A. Azzouz. 2011 , 2020, City.
[4] Jeyavijayan Rajendran,et al. Belling the CAD: Toward Security-Centric Electronic System Design , 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[5] Fabrizio Ferrandi,et al. Bambu: A modular framework for the high level synthesis of memory-intensive applications , 2013, 2013 23rd International Conference on Field programmable Logic and Applications.
[6] S. M. García,et al. 2014: , 2020, A Party for Lazarus.
[7] Siddharth Garg,et al. Securing Computer Hardware Using 3D Integrated Circuit (IC) Technology and Split Manufacturing for Obfuscation , 2013, USENIX Security Symposium.
[8] A. James. 2010 , 2011, Philo of Alexandria: an Annotated Bibliography 2007-2016.
[9] Leon Stok,et al. Data path synthesis , 1994, Integr..
[10] Nur A. Touba,et al. Improving logic obfuscation via logic cone analysis , 2015, 2015 16th Latin-American Test Symposium (LATS).
[11] Jeorge S. Hurtarte,et al. Understanding Fabless IC Technology , 2007 .
[12] Giovanni De Micheli,et al. Synthesis and Optimization of Digital Circuits , 1994 .
[13] Sayak Ray,et al. Evaluating the security of logic encryption algorithms , 2015, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).
[14] Jeorge S. Hurtarte,et al. Chapter 5 – Fabless ASICs , 2007 .
[15] Yu Ting Chen,et al. A Survey and Evaluation of FPGA High-Level Synthesis Tools , 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[16] Mark Mohammad Tehranipoor,et al. Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain , 2014, Proceedings of the IEEE.
[17] Pim Tuyls,et al. Anti-counterfeiting with hardware intrinsic security , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[18] Ankur Srivastava,et al. Mitigating SAT Attack on Logic Locking , 2016, CHES.
[19] Swarup Bhunia,et al. Hardware Protection through Obfuscation , 2017 .
[20] Edoardo Charbon. Hierarchical watermarking in IC design , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).
[21] Bertrand Le Gal,et al. Bit-Width Aware High-Level Synthesis for Digital Signal Processing Systems , 2006, SoCC.
[22] C. Martin. 2015 , 2015, Les 25 ans de l’OMC: Une rétrospective en photos.