Performance optimization for on-chip sensors to detect recycled ICs

IC recycling has become a grave problem in today's globalized semiconductor industry, with potential impact to critical infrastructures. In order to mitigate this problem, various Design-for-Anti-Counterfeit (DfAC) measures have been recently proposed. In this paper, we look at DfAC strategies based on recycling sensors, most notably the ones based on a pair of ring oscillators, which rely on integrated circuit aging phenomena to detect usage of ICs in the field. We introduce a novel optimization technique that generalizes to most recycling sensors suggested so far in literature and gives manufacturers exact control over parameters that determine sensor performance, such as yield, misprediction and area overhead. A detailed analysis of various factors affecting recycling sensor performance is presented and an optimization problem is formulated and verified using simulations, in order to demonstrate the accuracy of the approach.

[1]  Mark Mohammad Tehranipoor,et al.  Aging analysis for recycled FPGA detection , 2014, 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

[2]  C. Kim,et al.  Silicon Odometer: An On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits , 2008, IEEE Journal of Solid-State Circuits.

[3]  Ujjwal Guin,et al.  Counterfeit Integrated Circuits: Detection and Avoidance , 2015 .

[4]  Mark Mohammad Tehranipoor,et al.  Low-cost on-chip structures for combating die and IC recycling , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[5]  G ci Continuous Improvement Fraudulent/Counterfeit Electronic Parts; Avoidance, Detection, Mitigation, and Disposition , 2013 .

[6]  Farinaz Koushanfar,et al.  Active Hardware Metering for Intellectual Property Protection and Security , 2007, USENIX Security Symposium.

[7]  Swaroop Ghosh,et al.  Novel self-calibrating recycling sensor using Schmitt-Trigger and voltage boosting for fine-grained detection , 2015, Sixteenth International Symposium on Quality Electronic Design.

[8]  Mark Mohammad Tehranipoor,et al.  Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain , 2014, Proceedings of the IEEE.

[9]  Yu Zheng,et al.  CACI: Dynamic current analysis towards robust recycled chip identification , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[10]  Yiorgos Makris,et al.  Parametric counterfeit IC detection via Support Vector Machines , 2012, 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

[11]  T. Oldham,et al.  Total ionizing dose effects in MOS oxides and devices , 2003 .

[12]  Mark Mohammad Tehranipoor,et al.  Path-delay fingerprinting for identification of recovered ICs , 2012, 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

[13]  Cliff Wang,et al.  Introduction to Hardware Security and Trust , 2011 .

[14]  Mark Mohammad Tehranipoor,et al.  Design of On-Chip Lightweight Sensors for Effective Detection of Recycled ICs , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[15]  Dieter K. Schroder,et al.  Negative bias temperature instability: What do we understand? , 2007, Microelectron. Reliab..