Leveraging Stochastic Memristor Devices in Neuromorphic Hardware Systems

As the fourth basic circuit element, memristor has a unique synapse-alike feature which demonstrates great potentials in neuromorphic circuit design. However, a large gap exists between the theoretical memristor characteristics and the actual device behavior. For example, though the continuous changing in resistance state is expected in neuromorphic circuit design, it is difficult to maintain arbitrary intermediate state. In addition, the stochastic switching behaviors have been widely observed in nano-scale memristor devices. In this work, we first developed a stochastic behavior model in order to facilitate the investigation on memristor-based hardware implementation. Our modeling was based on the statistical analysis of experimental data of TiO2 device. By leveraging the stochastic behavior of memristors, a random number generator was proposed. We also presented a macro cell design composed of multiple parallel connecting memristors which can be successfully used in implementing the weight storage unit and the stochastic neuron. The designs of these fundamental components provide a feasible solution in memristor-based hardware implementation of neural networks.

[1]  L. Chua.  Memristor-The missing circuit element , 1971 .

[2]  Kurt Hornik,et al.  Multilayer feedforward networks are universal approximators , 1989, Neural Networks.

[3]  Timothy X. Brown,et al.  Analog VLSI neural networks: implementation issues and examples in optimization and supervised learning , 1992, IEEE Trans. Ind. Electron..

[4]  Mohamad H. Hassoun,et al.  Associative neural memories , 1993 .

[5]  Yoshua Bengio,et al.  Gradient-based learning applied to document recognition , 1998, Proc. IEEE.

[6]  J. Alvin Connelly,et al.  A noise-based IC random number generator for applications in cryptography , 2000 .

[7]  James A. Hutchby,et al.  Limits to binary logic switch scaling - a gedanken model , 2003, Proc. IEEE.

[8]  P. Hasler,et al.  Floating-gates transistors for precision analog circuit design: an overview , 2005, 48th Midwest Symposium on Circuits and Systems, 2005..

[9]  Alan F. Murray,et al.  Continuous-valued probabilistic behavior in a VLSI generative model , 2006, IEEE Transactions on Neural Networks.

[10]  Arvind Kumar,et al.  Silicon CMOS devices beyond scaling , 2006, IBM J. Res. Dev..

[11]  C. N. Lau,et al.  The mechanism of electroforming of metal oxide memristive switches , 2009, Nanotechnology.

[12]  C. N. Lau,et al.  Force modulation of tunnel gaps in metal oxide memristive nanoswitches , 2009 .

[13]  D. Stewart,et al.  The missing memristor found , 2009, Nature.

[14]  J. Yang,et al.  Switching dynamics in titanium dioxide memristive devices , 2009 .

[15]  R. Waser,et al.  Mechanism for bipolar switching in a Pt / TiO 2 / Pt resistive switching cell , 2009 .

[16]  W. Arden,et al.  More Than Moore White Paper , 2021, 2021 IEEE International Roadmap for Devices and Systems Outbriefs.

[17]  Kiat Seng Yeo,et al.  A random number generator for low power cryptographic application , 2010, 2010 International SoC Design Conference.

[18]  K. D. Cantley,et al.  Hebbian Learning in Spiking Neural Networks With Nanocrystalline Silicon TFTs and Memristive Synapses , 2011, IEEE Transactions on Nanotechnology.

[19]  M. Pickett,et al.  Lognormal switching times for titanium dioxide bipolar memristors: origin and resolution , 2011, Nanotechnology.

[20]  S. Ha,et al.  Adaptive oxide electronics: A review , 2011 .

[21]  Yiran Chen,et al.  Geometry variations analysis of TiO2 thin-film and spintronic memristors , 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

[22]  J. Yang,et al.  Feedback write scheme for memristive switching devices , 2011 .

[23]  Qing Wu,et al.  Hardware realization of BSB recall function using memristor crossbar arrays , 2012, DAC Design Automation Conference 2012.

[24]  Byung Joon Choi,et al.  Engineering nonlinearity into memristors for passive crossbar applications , 2012 .

[25]  Shimeng Yu,et al.  Metal–Oxide RRAM , 2012, Proceedings of the IEEE.

[26]  Narayan Srinivasa,et al.  A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. , 2012, Nano letters.

[27]  Shimeng Yu,et al.  On the Switching Parameter Variation of Metal-Oxide RRAM—Part I: Physical Modeling and Simulation Methodology , 2012, IEEE Transactions on Electron Devices.

[28]  Geoffrey E. Hinton,et al.  ImageNet classification with deep convolutional neural networks , 2012, Commun. ACM.

[29]  Leon O. Chua,et al.  Neural Synaptic Weighting With a Pulse-Based Memristor Circuit , 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

[30]  Ya-Chin King,et al.  A Contact-Resistive Random-Access-Memory-Based True Random Number Generator , 2012, IEEE Electron Device Letters.

[31]  Shimeng Yu,et al.  Stochastic learning in oxide binary synaptic device for neuromorphic computing , 2013, Front. Neurosci..

[32]  Fabien Alibart,et al.  Pattern classification by memristive crossbar circuits using ex situ and in situ training , 2013, Nature Communications.

[33]  Yiran Chen,et al.  Memristor Crossbar-Based Neuromorphic Computing System: A Case Study , 2014, IEEE Transactions on Neural Networks and Learning Systems.

[34]  E. Vianello,et al.  Variability-tolerant Convolutional Neural Network for Pattern Recognition applications based on OxRAM synapses , 2014, 2014 IEEE International Electron Devices Meeting.