High mobility high-k/Ge pMOSFETs with 1 nm EOT -New concept on interface engineering and interface characterization

High-k/Ge interfaces are significantly improved through a new interface engineering scheme of using both effective pre-gate surface GeO<sub>2</sub> passivation and post gate dielectric (post-gate) treatment incorporating fluorine (F) into high-k/Ge gate stack. Minimum density of interface states (D<sub>it</sub>) of 2 times 10<sup>11</sup> cm<sup>-2</sup>eV<sup>-1</sup> is obtained for Ge MOS capacitors. Hole mobility up to 396 cm<sup>2</sup>/Vs is achieved for Ge pMOSFETs with EOT ~10 Aring and gate leakage current density less than 10<sup>-3</sup> A/cm<sup>2</sup> at V<sub>t</sub> plusmn 1 V. Best drain current to date of 37.8 muA/mum at V<sub>g</sub>-V<sub>t</sub> = Vd= -1.2V is presented for an L<sub>g</sub> of 10 mum. Variable rise and fall time charge pumping (CP) method is used to investigate Ge interface property and a significant D<sub>it</sub> reduction in both upper and lower half of bandgap is observed with F incorporation.