A 1-V 2.4-GHz PLL synthesizer with a fully differential prescaler and a low-off-leakage charge pump

A 1 V 2.4 GHz-band fully monolithic PLL synthesizer was fabricated using 0.2 /spl mu/m CMOS/SOI process technology. It includes a voltage controlled oscillator (VCO) and a 3 GHz fully differential dual-modulus prescaler on a chip. A low-off-leakage-current charge pump is used for open-loop FSK modulation. When the PLL is in open loop mode, the frequency drift of the output is lower than 2.5 Hz//spl mu/sec. The output phase noise is -104 dBc/Hz at 1 MHz offset frequency. The power consumption of the PLL-IC core is 17 mW at 1 V supply voltage.

[1]  B. Razavi,et al.  A stabilization technique for phase-locked frequency synthesizers , 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).

[2]  M. Ugajin,et al.  A 0.6-V voltage reference circuit based on /spl Sigma/-V/sub TH/ architecture in CMOS/SIMOX , 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).

[3]  Tsuneo Tsukahara,et al.  A low-voltage 6-GHz-band CMOS monolithic LC-tank VCO using a tuning-range switching technique , 2000, 2000 IEEE MTT-S International Microwave Symposium Digest (Cat. No.00CH37017).

[4]  Hong Mo Wang A 1 V multi-gigahertz RF mixer core in 0.5 μm CMOS , 1998 .

[5]  Tsuneo Tsukahara,et al.  18.3 A 1V 12mW 2GHz Receiver with 49dB Image Rejection in CMOS/SIMOX , 2001 .

[6]  Howard C. Luong,et al.  A 1.5-V 900-MHz monolithic CMOS fast-switching frequency synthesizer for wireless applications , 2000 .