Recon gurable Systems: A Survey
暂无分享,去创建一个
[1] Steven A. Guccione. List of FPGA-based computing machines , 1997 .
[2] Michel Dubois,et al. The Design of RPM: An FPGA-based Multiprocessor Emulator , 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.
[3] Duncan A. Buell,et al. Splash 2 - FPGAs in a custom computing machine , 1996 .
[4] David E. van den Bout,et al. AnyBoard: an FPGA-based, reconfigurable system , 1992, IEEE Design & Test of Computers.
[5] Peter Y. K. Cheung,et al. Area and time limitations of FPGA-based virtual hardware , 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.
[6] David R. Galloway. The Transmogrifier C hardware description language and compiler for FPGAs , 1995, Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.
[7] Toshiaki Miyazaki,et al. Reconfigurable real-time signal transport system using custom FPGAs , 1995, Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.
[8] Reiner W. Hartenstein,et al. A New FPGA Architecture for Word-Oriented Datapaths , 1994, FPL.
[9] Dominique Lavenier,et al. Fine grain parallelism on a MIMD machine using FPGAs , 1993, [1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines.
[10] A. Smith,et al. PRISM-II compiler and architecture , 1993, [1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines.
[11] Mark Shand,et al. Programmable active memories: reconfigurable systems come of age , 1996, IEEE Trans. Very Large Scale Integr. Syst..
[12] W. T. Wilner,et al. Design of the Burroughs B1700 , 1972, AFIPS '72 (Fall, part I).
[13] A. F. Adams,et al. The Survey , 2021, Dyslexia in Higher Education.
[14] Masato Motomura,et al. An Embedded DRAM-FPGA Chip With Instantaneous Logic Reconfiguration , 1997, Symposium 1997 on VLSI Circuits.
[15] Jonathan M. Smith,et al. P4: A platform for FPGA implementation of protocol boosters , 1997, FPL.
[16] Peter M. Athanas,et al. Wormhole run-time reconfiguration , 1997, FPGA '97.
[17] Pierre Marchal,et al. Field-programmable gate arrays , 1999, CACM.
[18] Toshiaki Miyazaki,et al. YARDS: FPGA/MPU hybrid architecture for telecommunication data processing , 1997, FPGA '97.
[19] Gianluca Tempesti,et al. Embryonics: a new family of coarse-grained field-programmable gate array with self-repair and self-reproducing properties , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.
[20] Wayne Luk,et al. Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research , 1997, FPL.
[21] W. E. Blanz,et al. GANGLION-a fast hardware implementation of a connectionist classifier , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.
[22] Katsunori Shimohara,et al. Hardware Evolution System Introducing Dominant and Recessive Heredity , 1996, ICES.
[23] Hideharu Amano,et al. WASMII: a data driven computer on a virtual hardware , 1993, [1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines.
[24] Kotaro Hirano,et al. Reconfigurable machine and its application to logic diagnosis , 1992, ICCAD.
[25] Aaas News,et al. Book Reviews , 1893, Buffalo Medical and Surgical Journal.