CASTOR: an expert advisor for testability enhancement of VLSI systems
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Donatella Sciuto | Cristiana Bolchini | Giacomo Buonanno | M. Bombana | P. Cavalloro | G. Zaza | G. Bezzi | I. Bolzoni | S. Cantu
[1] Chien-In Henry Chen. BISTSYN-a built-in self-test synthesizer , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.
[2] Parimal Pal Chaudhuri,et al. Expert system to configure global design for testability structure in a VLSI circuit , 1989, Microprocess. Microsystems.
[3] Donatella Sciuto,et al. A multilevel testability assistant for VLSI design , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.
[4] Ralph H. J. M. Otten,et al. Tackling cost optimization in testable design by forward inferencing , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.
[5] Hans G. Kerkhoff,et al. A design-for-testability expert system for silicon compilers , 1991, Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's.
[6] Dong Sam Ha,et al. BIDES: A BIST design expert system , 1991, J. Electron. Test..
[7] Kyushik Son. Rule Based Testability Checker and Test Generator , 1985, ITC.
[8] Donatella Sciuto,et al. ALADIN: a multilevel testability analyzer for VLSI system design , 1994, IEEE Trans. Very Large Scale Integr. Syst..
[9] Magdy Abadir,et al. A Knowledge-Based System for Designing Testable VLSI Chips , 1985, IEEE Design & Test of Computers.
[10] Edward J. McCluskey,et al. Self-Testing Embedded Parity Checkers , 1984, IEEE Transactions on Computers.
[11] Melvin A. Breuer,et al. A Knowledge Based System for Selecting a Test Methodology for a PLA , 1985, DAC 1985.
[12] Grace C. Chen-Ellis,et al. PROSPECT : A Production System for Partitioning and Evaluating Chip Testability , 1986, ITC.
[13] Melvin A. Breuer,et al. SIESTA: a multi-facet scan design system , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.