Fully-adaptive routing: packet switching performance and wormhole algorithms

No abstract available

[1]  P. Merlin,et al.  Deadlock Avoidance in Store-and-Forward Networks - I: Store-and-Forward Deadlock , 1980, IEEE Transactions on Communications.

[2]  Frank Thomson Leighton,et al.  Average case analysis of greedy routing algorithms on arrays , 1990, SPAA '90.

[3]  Daniel M. Dias,et al.  Analysis and Simulation of Buffered Delta Networks , 1981, IEEE Transactions on Computers.

[4]  Gregory F. Pfister,et al.  “Hot spot” contention and combining in multistage interconnection networks , 1985, IEEE Transactions on Computers.

[5]  C. Greg Plaxton,et al.  Deterministic sorting in nearly logarithmic time on the hypercube and related computers , 1990, STOC '90.

[6]  Thomas G. Robertazzi,et al.  The Performance of Multistage Interconnection Networks for Multiprocessors , 1993 .

[7]  Thomas G. Robertazzi.  Performance of ProcessorMemory Interconnections for Multiprocessors , 1993 .

[8]  Bruce M. Maggs,et al.  Empirical Evaluation of Randomly-Wired Multistage Networks (Extended Abstract) , 1990 .

[9]  Smaragda Konstantinidou.  Adaptive, minimal routing in hypercubes , 1990 .

[10]  Leslie G. Valiant,et al.  Universal schemes for parallel communication , 1981, STOC '81.

[11]  Eli Upfal,et al.  An O(logN) deterministic packet routing scheme , 1989, STOC '89.

[12]  Marc Snir,et al.  The Performance of Multistage Interconnection Networks for Multiprocessors , 1983, IEEE Transactions on Computers.

[13]  Klaus D. Günther.  Prevention of Deadlocks in Packet-Switched Data Transport Systems , 1981, IEEE Trans. Commun..

[14]  Abhiram G. Ranade,et al.  How to emulate shared memory , 1991, 28th Annual Symposium on Foundations of Computer Science (sfcs 1987).

[15]  Daniel H. Linder,et al.  An Adaptive and Fault Tolerant Wormhole Routing Strategy for k-Ary n-Cubes , 1994, IEEE Trans. Computers.

[16]  Eli Upfal,et al.  An O(log N) deterministic packet-routing scheme , 1992, JACM.

[17]  Luis Gravano,et al.  Fully-adaptive minimal deadlock-free packet routing in hypercubes, meshes, and other networks , 1991, SPAA '91.

[18]  Janak H. Patel.  Performance of Processor-Memory Interconnections for Multiprocessors , 1981, IEEE Transactions on Computers.

[19]  Jorge L. C. Sanz,et al.  A Comparison of SIMD Hypercube Routing Strategies , 1991, ICPP.

[20]  Eli Upfal,et al.  Efficient schemes for parallel communication , 1982, PODC '82.

[21]  Leslie G. Valiant,et al.  Optimality of a Two-Phase Strategy for Routing in Interconnection Networks , 1983, IEEE Transactions on Computers.