This paper presents three paradigms for circuit design, and investigates the relationships between them. These paradigms are syntactic (based on Freyd and Scedrov's unitary pre-tabular allegories (upas), pictorial (based on the net list model of circuit connectivity), and relational (based on Sheeran's relational model of circuit design Ruby). We show that net lists over a given signature ∑ constitute the free upa on ∑. Our proof demonstrates that nets and upas are equally expressive, and that nets provide a normal form for both upas and pictures. We use Freyd and Scedrov's representation theorem for upas to show that our relational interpretations constitute a sound and complete class of models for the upa axioms. Thus we can reason about circuits using either the upa axioms, pictures or relations. By considering garbage collection, we show that there is no faithful representation of nets in Rel: we conjecture that a semantics for nets which takes garbage collection into account is faithfully representable in Rel.
[1]
Randall L. Geiger,et al.
VLSI Design Techniques for Analog and Digital Circuits
,
1989
.
[2]
M. Sheeran,et al.
Theoretical Foundations of VLSI Design: Describing and reasoning about circuits using relations
,
1990
.
[3]
Andre Scedrov,et al.
Categories, allegories
,
1990,
North-Holland mathematical library.
[4]
Graham Hutton,et al.
Categories, allegories and circuit design
,
1994,
Proceedings Ninth Annual IEEE Symposium on Logic in Computer Science.
[5]
Steven M. Rubin,et al.
Computer Aids For VLSI Design
,
1987
.
[6]
A. Carboni,et al.
Cartesian bicategories I
,
1987
.