High-resolution offset-frequency PLL using properties of co-prime numbers

A new offset-frequency phase-locked loop (PLL) that realises high-frequency resolution based on a mathematical relation between the output frequency and the offset frequency is proposed. The proposed PLL achieved a 0.1 MHz frequency resolution while using a 1.1 MHz reference clock. The PLL consisted of a main PLL, a delay-locked loop based programmable frequency multiplier, and a single-sideband mixer. The prototype PLL was fabricated with a 0.18 m CMOS technology, and occupies a 0.29 mm 2 active silicon area.