论文信息 - A 64-ch Time Memory Cell module with a DSP and a VME interface

A 64-ch Time Memory Cell module with a DSP and a VME interface

A new 64-channel Time Memory Cell (TMC) module has been developed for high-rate wire-chamber applications. A combination of the TMC chip and associated FIFO memories digitize and store input signals at 1 nsec/bit resolution for a period of 64 /spl mu/sec. To handle the large data size, a digital signal processor (DSP56002) is implemented in the module. The size of the module is 9U/spl times/400 mm Euroboard size, and has a VME interface using the P1 and P2 connectors. The P3 connector has been assigned for the output of trigger signals. >

Yasuo Arai | Masahiro Ikeno

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