FPGA-Accelerated Simulation of Computer Systems
暂无分享,去创建一个
[1] Christoforos E. Kozyrakis,et al. ZSim: fast and accurate microarchitectural simulation of thousand-core systems , 2013, ISCA.
[2] Fredrik Larsson,et al. Simics: A Full System Simulation Platform , 2002, Computer.
[3] Margaret Martonosi,et al. An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation , 2006, IEEE Computer Architecture Letters.
[4] John Wawrzynek,et al. RAMP Blue: A Message-Passing Manycore System in FPGAs , 2007, 2007 International Conference on Field Programmable Logic and Applications.
[5] Dam Sunwoo,et al. FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators , 2007, MICRO.
[6] Kunle Olukotun,et al. ATLAS: A Chip-Multiprocessor with Transactional Memory Support , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.
[7] Nathan L. Binkert,et al. Network-Oriented Full-System Simulation using M5 , 2003 .
[8] Dam Sunwoo,et al. RAMP-White : An FPGA-Based Coherent Shared Memory Parallel Computer Emulator , 2007 .
[9] Dionisios N. Pnevmatikatos,et al. ReSim, a trace-driven, reconfigurable ILP processor simulator , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.
[10] J. E. Thornton,et al. Parallel operation in the control data 6600 , 1964, AFIPS '64 (Fall, part II).
[11] Christopher Small,et al. An overview of the Sam CMT simulator kit , 2004 .
[12] Todd M. Austin,et al. SimpleScalar: An Infrastructure for Computer System Modeling , 2002, Computer.
[13] Dam Sunwoo,et al. QUICK: A flexible full-system functional model , 2009, 2009 IEEE International Symposium on Performance Analysis of Systems and Software.
[14] William E. Weihl,et al. Reducing synchronization overhead in parallel simulation , 1996, Workshop on Parallel and Distributed Simulation.
[15] Matt T. Yourst. PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator , 2007, 2007 IEEE International Symposium on Performance Analysis of Systems & Software.
[16] Tom Feist,et al. Vivado Design Suite , 2012 .
[17] Jonathan Rose,et al. Measuring the Gap Between FPGAs and ASICs , 2007, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[18] Fabrice Bellard,et al. QEMU, a Fast and Portable Dynamic Translator , 2005, USENIX ATC, FREENIX Track.
[19] Gregory R. Ganger,et al. The DiskSim Simulation Environment Version 4.0 Reference Manual (CMU-PDL-08-101) , 1998 .
[20] Jianwei Chen,et al. SlackSim: a platform for parallel simulations of CMPs on CMPs , 2009, CARN.
[21] Ronny Krashinsky,et al. Microprocessor energy characterization and optimization through fast, accurate, and flexible simulation , 2001 .
[22] Babak Falsafi,et al. A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs , 2008, FPGA '08.
[23] Dam Sunwoo,et al. PrEsto: An FPGA-accelerated Power Estimation Methodology for Complex Systems , 2010, 2010 International Conference on Field Programmable Logic and Applications.
[24] John Wawrzynek,et al. BEE2: a high-end reconfigurable computing system , 2005, IEEE Design & Test of Computers.
[25] Brad Calder,et al. Automatically characterizing large scale program behavior , 2002, ASPLOS X.
[26] David I. August,et al. Exploiting parallelism and structure to accelerate the simulation of chip multi-processors , 2006, The Twelfth International Symposium on High-Performance Computer Architecture, 2006..
[27] David A. Patterson,et al. A case for FAME: FPGA architecture model execution , 2010, ISCA.
[28] Dam Sunwoo,et al. Accurate Functional-First Multicore Simulators , 2009, IEEE Computer Architecture Letters.
[29] James R. Larus,et al. Wisconsin Wind Tunnel II: a fast, portable parallel architecture simulator , 2000, IEEE Concurr..
[30] Babak Falsafi,et al. ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs , 2009, TRETS.
[31] David A. Wood,et al. Full-system timing-first simulation , 2002, SIGMETRICS '02.
[32] Alan D. George,et al. Parallel simulation of chip-multiprocessor architectures , 2002, TOMC.
[33] Roland E. Wunderlich,et al. SMARTS: accelerating microarchitecture simulation via rigorous statistical sampling , 2003, 30th Annual International Symposium on Computer Architecture, 2003. Proceedings..
[34] Dam Sunwoo,et al. The FAST methodology for high-speed SoC/computer simulation , 2007, ICCAD 2007.
[35] James C. Hoe,et al. High-Level Design and Validation of the BlueSPARC Multithreaded Processor , 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[36] Arvind,et al. A-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs , 2008, FPGA '08.
[37] Michael Adler,et al. HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing , 2011, 2011 IEEE 17th International Symposium on High Performance Computer Architecture.
[38] George Kurian,et al. Graphite: A distributed parallel simulator for multicores , 2010, HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture.