Constructing LDPC codes from simple loop-free encoding modules

Inspired by recently proposed accumulate-repeat-accumulate (ARA) codes, in this paper we propose a construction method for LDPC codes using simple loop-free encoding modules. Such codes can be viewed as serial/parallel concatenations of simple modules such as accumulators, repetition codes, differentiators, and punctured single parity check codes. Examples are accumulate-repeat-accumulate (ARA) codes, accumulate-repeat-accumulate-accumulate (ARAA) codes and accumulate-repeat-check-accumulate codes, and other variations. These codes constitute a subclass of LDPC codes with very fast encoder structure. They also have a projected graph or protograph representation that allows for high-speed decoder implementation. Based on density evolution, we show through some examples that low iterative decoding thresholds close to the channel capacity limits can be achieved with low maximum variable node degrees, as the block size goes to infinity. The decoding threshold in many examples outperforms that of the best known unstructured irregular LDPC codes constrained to have the same maximum node degree. Furthermore, by puncturing the accumulator modules, any desired higher rate codes can be obtained with thresholds that stay close to their respective channel capacity thresholds uniformly.

[1]  Dariush Divsalar,et al.  Coding theorems for 'turbo-like' codes , 1998 .

[2]  Radford M. Neal,et al.  Near Shannon limit performance of low density parity check codes , 1996 .

[3]  Daniel A. Spielman,et al.  Analysis of low density codes and improved designs using irregular graphs , 1998, STOC '98.

[4]  Dariush Divsalar,et al.  Accumulate repeat accumulate codes , 2004, ISIT.

[5]  J. Thorpe.  Low-Density Parity-Check (LDPC) Codes Constructed from Protographs , 2003 .

[6]  Alain Glavieux,et al.  Reflections on the Prize Paper : "Near optimum error-correcting coding and decoding: turbo codes" , 1998 .

[7]  Daniel A. Spielman,et al.  Improved low-density parity-check codes using irregular graphs and belief propagation , 1998, Proceedings. 1998 IEEE International Symposium on Information Theory (Cat. No.98CH36252).

[8]  T. Richardson,et al.  Multi-Edge Type LDPC Codes , 2004 .

[9]  Robert Michael Tanner,et al.  A recursive approach to low complexity codes , 1981, IEEE Trans. Inf. Theory.

[10]  Rüdiger L. Urbanke,et al.  The capacity of low-density parity-check codes under message-passing decoding , 2001, IEEE Trans. Inf. Theory.

[11]  Frank R. Kschischang.  Codes defined on graphs , 2003, IEEE Commun. Mag..

[12]  Sae-Young Chung,et al.  On the design of low-density parity-check codes within 0.0045 dB of the Shannon limit , 2001, IEEE Communications Letters.

[13]  Robert G. Gallager,et al.  Low-density parity-check codes , 1962, IRE Trans. Inf. Theory.

[14]  Dariush Divsalar,et al.  Iterative turbo decoder analysis based on density evolution , 2001, IEEE J. Sel. Areas Commun..

[15]  Shu Lin,et al.  Low-density parity-check codes based on finite geometries: A rediscovery and new results , 2001, IEEE Trans. Inf. Theory.

[16]  Shu Lin,et al.  A combinatoric superposition method for constructing low density parity check codes , 2003, IEEE International Symposium on Information Theory, 2003. Proceedings..

[17]  H. Jin,et al.  Irregular repeat accumulate codes , 2000 .

[18]  Rüdiger L. Urbanke,et al.  The renaissance of Gallager's low-density parity-check codes , 2003, IEEE Commun. Mag..

[19]  Rüdiger L. Urbanke,et al.  Design of capacity-approaching irregular low-density parity-check codes , 2001, IEEE Trans. Inf. Theory.

[20]  F. Pollara,et al.  Serial concatenation of interleaved codes: performance analysis, design and iterative decoding , 1996, Proceedings of IEEE International Symposium on Information Theory.