Remembrance of circuits past: macromodeling by data mining in large analog design spaces

The introduction of simulation-based analog synthesis tools creates a new challenge for analog modeling. These tools routinely visit 103 to 105 fully simulated circuit solution candidates. What might we do with all this circuit data? We show how to adapt recent ideas from large-scale data mining to build models that capture significant regions of this visited performance space, parameterized by variables manipulated by synthesis, trained by the data points visited during synthesis. Experimental results show that we can automatically build useful nonlinear regression models for large analog design spaces.

[1]  Ernst Christen,et al.  Vhdl-ams---a hardware description language for analog and mixed-signal applications , 1999 .

[2]  Stephen W. Director,et al.  A new methodology for the design centering of IC fabrication processes , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Yoav Freund,et al.  A decision-theoretic generalization of on-line learning and an application to boosting , 1995, EuroCOLT.

[4]  Rob A. Rutenbar,et al.  Computer-aided design of analog and mixed-signal integrated circuits , 2000, Proceedings of the IEEE.

[5]  Rob A. Rutenbar,et al.  MAELSTROM: efficient simulation-based synthesis for custom analog cells , 1999, DAC '99.

[6]  Rob A. Rutenbar,et al.  OASYS: a framework for analog circuit synthesis , 1989, Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,.

[7]  John W. Bandler,et al.  An Introduction to the Space Mapping Technique , 2001 .

[8]  Yoshua Bengio,et al.  Pattern Recognition and Neural Networks , 1995 .

[9]  Resve A. Saleh,et al.  Consistency checking and optimization of macromodels , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  J. S. Hunter,et al.  Statistics for experimenters : an introduction to design, data analysis, and model building , 1979 .

[11]  Joel R. Phillips.  Automated extraction of nonlinear circuit macromodels , 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

[12]  Stephen P. Boyd,et al.  GPCAD: a tool for CMOS op-amp synthesis , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[13]  J. Solomon,et al.  Macromodeling of integrated circuit operational amplifiers , 1974 .

[14]  Lawrence T. Pileggi,et al.  PRIMA: passive reduced-order interconnect macromodeling algorithm , 1997, ICCAD 1997.

[15]  Rob A. Rutenbar,et al.  Anaconda: simulation-based synthesis of analog circuits viastochastic pattern search , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[16]  Harris Drucker,et al.  Improving Regressors using Boosting Techniques , 1997, ICML.

[17]  Stephen W. Director,et al.  A new methodology for the design centering of IC fabrication processes , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[18]  Georges G. E. Gielen,et al.  Simulation-based automatic generation of signomial and posynomial performance models for analog integrated circuit sizing , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[19]  Rob A. Rutenbar,et al.  ASF: a practical simulation-based methodology for the synthesis of custom analog circuits , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[20]  J. S. Hunter,et al.  Statistics for Experimenters: An Introduction to Design, Data Analysis, and Model Building. , 1979 .

[21]  Andrew W. Moore,et al.  Efficient Locally Weighted Polynomial Regression Predictions , 1997, ICML.

[22]  Eric Bauer,et al.  An Empirical Comparison of Voting Classification Algorithms: Bagging, Boosting, and Variants , 1999, Machine Learning.

[23]  Hanan Samet,et al.  Ranking in Spatial Databases , 1995, SSD.

[24]  Rob A. Rutenbar,et al.  A case study of synthesis for industrial-scale analog IP: redesign of the equalizer/filter frontend for an ADSL CODEC , 2000, Proceedings 37th Design Automation Conference.

[25]  Dennis L. Young,et al.  Application of statistical design and response surface methods to computer-aided VLSI device design , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[26]  Kurt Antreich,et al.  Automating the sizing of analog CMOS circuits by consideration of structural constraints , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[27]  Peter Frey,et al.  Verilog-AMS: Mixed-signal simulation and cross domain connect modules , 2000, Proceedings 2000 IEEE/ACM International Workshop on Behavioral Modeling and Simulation.

[28]  Ramesh Harjani,et al.  Feasibility and performance region modeling of analog and digital circuits , 1996 .

[29]  John W. Bandler,et al.  Review of the Space Mapping Approach to Engineering Optimization and Modeling , 2000 .