Extended Dynamic Range From a Combined Linear-Logarithmic CMOS Image Sensor

A CMOS image sensor that can operate in both linear and logarithmic mode is described. Two sets of data are acquired and combined in the readout path to render a high dynamic range image. This is accomplished in real-time without the use of frame memory. A dynamic range in excess of 120 dB was achieved at 26 frames/s (352times288-array). The system addresses the problems of high fixed pattern noise (FPN), slow response time, and low signal-to-noise ratio (SNR) in logarithmic mode. FPN has been effectively reduced by single and two parameter calibration, the latter achieving FPN of 2% per decade. A novel on-chip method of deriving a reference point has been implemented. The system is fabricated in a 0.18-mum 1P4M process and achieves a pixel pitch of 5.6 mum with 7 transistors per pixel

[1]  S. Kavadias,et al.  A logarithmic response CMOS image sensor with on-chip calibration , 2000, IEEE Journal of Solid-State Circuits.

[2]  Abbas El Gamal,et al.  Comparative analysis of SNR for image sensors with enhanced dynamic range , 1999, Electronic Imaging.

[3]  Markus Böhm,et al.  Design and fabrication of a high-dynamic-range image sensor in TFA technology , 1999 .

[4]  Bart Dierickx,et al.  Random addressable 2048/spl times/2048 active pixel image sensor , 1997 .

[5]  Charles Sodini,et al.  Predictive multiple sampling algorithm with overlapping integration intervals for linear wide dynamic range integrating image sensors , 2004, IEEE Transactions on Intelligent Transportation Systems.

[6]  Barry Fowler,et al.  A 640×512 CMOS Image Sensor with Ultra Wide Dynamic Range Floating-Point Pixel-Level ADC , 1999 .

[7]  S. G. Chamberlain,et al.  A novel wide dynamic range silicon photodetector and linear imaging array , 1984 .

[8]  A. El Gamal,et al.  A 640/spl times/512 CMOS image sensor with ultra wide dynamic range floating-point pixel-level ADC , 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

[9]  Woodward Yang,et al.  An integrated 800/spl times/600 CMOS imaging system , 1999 .

[10]  Amine Bermak,et al.  A high fill-factor native logarithmic pixel: Simulation, design and layout optimization , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[11]  Douglas R. Dykaar,et al.  Wide-dynamic-range pixel with combined linear and logarithmic response and increased signal swing , 2000, Electronic Imaging.

[12]  Bart Dierickx,et al.  Random addressable active pixel image sensors , 1996, Advanced Imaging and Network Technologies.

[13]  J. Schemmel,et al.  A self-calibrating single-chip CMOS camera with logarithmic response , 2001, IEEE J. Solid State Circuits.

[14]  S. Collins,et al.  Modelling, calibration and correction of nonlinear illumination dependent fixed pattern noise in logarithmic CMOS image sensors , 2001, IMTC 2001. Proceedings of the 18th IEEE Instrumentation and Measurement Technology Conference. Rediscovering Measurement in the Age of Informatics (Cat. No.01CH 37188).

[15]  Richard Hornsey,et al.  CMOS active pixel image sensor with combined linear and logarithmic mode operation , 1998, Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341).

[16]  S. Decker,et al.  A 256/spl times/256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[17]  Orly Yadid-Pecht,et al.  Wide intrascene dynamic range CMOS APS using dual sampling , 1997 .

[18]  K. Findlater,et al.  SXGA pinned photodiode CMOS image sensor in 0.35 /spl mu/m technology , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

[19]  Steve Collins,et al.  Modeling, calibration, and correction of nonlinear illumination-dependent fixed pattern noise in logarithmic CMOS image sensors , 2002, IEEE Trans. Instrum. Meas..

[20]  Kiyoharu Aizawa,et al.  A computational image sensor with adaptive pixel-based integration time , 2001 .

[21]  J. Janesick,et al.  Charge-Coupled-Device Charge-Collection Efficiency And The Photon-Transfer Technique , 1987 .

[22]  S. Komori,et al.  A linear-logarithmic CMOS sensor with offset calibration using an injected charge signal , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[23]  J.E.D. Hurwitz,et al.  Combined linear-logarithmic CMOS image sensor , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

[24]  Robert Henderson,et al.  12.4 SXGA Pinned Photodiode CMOS Image Sensor in 0.35µm Technology , 2003 .