Timing Mismatch Compensation in Time-Interleaved ADCs Based on Multichannel Lagrange Polynomial Interpolation

In this paper, the timing mismatch compensation problem in the implementation of a time-interleaved analog-to-digital converter (TIADC) is investigated. The investigation leads to a novel multichannel Lagrange polynomial interpolation timing-mismatch compensation algorithm (MLPI-TMCA). A multichannel Lagrange compensation filter (MLCF) in the form of a finite-impulse response (FIR) filter is also developed for real-time implementation. The design of the compensation system is done in three steps. First, the coefficients of the MLCF are computed based on the mismatch parameters of the TIADC. Second, an Nth order FIR filtering process is performed for each sub-ADC. Third, a multiplexer is used to combine the output of each compensation filter in an orderly manner into the final compensated output signal. The computational complexity of this timing mismatch compensation system is of order N. Computer simulation results showed that MLPI-TMCA is computationally efficient and not sensitive to timing mismatch fluctuations. The actual implementation of a four-channel 320-MHz 12-bit TIADC showed that the MLPI-TMCA is able to efficiently compensate the timing mismatch in a real-time manner and produced about 30-dB spurious-free dynamic range (SFDR) enhancement when the input signal frequency is 70 MHz, whereas the multirate filter banks compensation method produced about 19 dB of SFDR enhancement under the same condition. Thus, the MLPI-TMCA and its multichannel filter implementation provides a good solution for TIADC real-time timing mismatch compensation and may be employed in TIADC chip design due to its implementation advantages.

[1]  Christian Vogel,et al.  A Flexible and Scalable Structure to Compensate Frequency Response Mismatches in Time-Interleaved ADCs , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

[2]  W. Black,et al.  Time interleaved converter arrays , 1980, 1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[3]  Haruo Kobayashi,et al.  Explicit analysis of channel mismatch effects in time-interleaved ADC systems , 2001 .

[4]  Jesus Selva.  Functionally Weighted Lagrange Interpolation of Band-Limited Signals From Nonuniform Samples , 2009, IEEE Transactions on Signal Processing.

[5]  Y. C. Lim.  New pipelined vector-reduction arithmetic unit for FIR filter implementation , 1987 .

[6]  Håkan Johansson,et al.  Reconstruction of nonuniformly sampled bandlimited signals by means of digital fractional delay filters , 2002, IEEE Trans. Signal Process..

[7]  Ieee Std,et al.  IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters , 2011 .

[8]  Gernot Kubin,et al.  Spectral shaping of timing mismatches in time-interleaved analog-to-digital converters , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[9]  Y. C. Lim.  A new approach for deriving scattered coefficients of pipelined IIR filters , 1995, IEEE Trans. Signal Process..

[10]  Yih-Chyun Jenq,et al.  Digital spectra of nonuniformly sampled signals: a robust sampling time offset estimation algorithm for ultra high-speed waveform digitizers using interleaving , 1990 .

[11]  Upamanyu Madhow,et al.  Blind Correction of Gain and Timing Mismatches for a Two-Channel Time-Interleaved Analog-to-Digital Converter , 2005, ASILOMAR 2005.

[12]  Bernard C. Levy,et al.  Blind Calibration of Timing Offsets for Four-Channel Time-Interleaved ADCs , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

[13]  Stephen H. Lewis,et al.  A comparison of monolithic background calibration in two time-interleaved analog-to-digital converters , 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

[14]  Yong Ching Lim.  Parallel and pipelined implementations of injected numerator lattice digital filters , 1995 .

[15]  Huawen Jin,et al.  A digital-background calibration technique for minimizing timing-error effects in time-interleaved ADCs , 2000 .

[16]  Fredrik Gustafsson,et al.  Amplitude and gain error influence on time error estimation algorithm for time interleaved A/D converter system , 2002, 2002 IEEE International Conference on Acoustics, Speech, and Signal Processing.

[17]  Bernard C. Levy,et al.  Reconstruction of band-limited periodic nonuniformly sampled signals through multirate filter banks , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[18]  Y.-C. Jenq,et al.  Perfect reconstruction of digital spectrum from nonuniformly sampled signals , 1997, IEEE Instrumentation and Measurement Technology Conference Sensing, Processing, Networking. IMTC Proceedings.

[19]  U. Madhow,et al.  Comprehensive digital correction of mismatch errors for a 400-msamples/s 80-dB SFDR time-interleaved analog-to-digital converter , 2005, IEEE Transactions on Microwave Theory and Techniques.

[20]  Gregory W. Wornell,et al.  Scalable blind calibration of timing skew in high-resolution time-interleaved ADCs , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[21]  A. Zerarka,et al.  Towards the best points of interpolation using particles swarm optimisation approach , 2007, 2007 IEEE Congress on Evolutionary Computation.

[22]  Bede Liu,et al.  Pipelined recursive filter with minimum order augmentation , 1992, IEEE Trans. Signal Process..

[23]  Yong Ching Lim,et al.  Time-Interleaved Analog-to-Digital-Converter Compensation Using Multichannel Filters , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

[24]  Franco Maloberti,et al.  On-line calibration of offset and gain mismatch in time-interleaved ADC using a sampled-data chaotic bit-stream , 2006, 2006 IEEE International Symposium on Circuits and Systems.