Design-for-test techniques utilized in an avionics computer MCM

This paper highlights the development of a multichip module (MCM) design-for-testability methodology for an application intended for use in a fully electronic active matrix LCD flight instrument. MCM test issues discussed include design-for-testability, substrate test, known-good die (KGD), and module level test. The design incorporates IEEE 1149.1 and built-in-self-test features. Bare die pretest is accomplished with a ball grid array (BGA) chip carrier approach. The hardware consists of a mature digital design comprised of application specific and industry standard integrated circuits. Challenges and lessons learned are addressed along with next generation test approaches.<<ETX>>

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