Fast power switch failure detection for fault tolerant voltage source inverters using FPGA

The design, implementation, experimental validation and performances of a fully digital fast power switch failure detection and compensation for fault-tolerant voltage source inverters (VSIs) are discussed. The approach introduced minimises the time interval between the fault occurrence and its diagnosis. The possibility to detect a faulty switch or driver of the VSI in less than 10 µs by using simultaneously a ‘time criterion’ and a ‘voltage criterion’ is demonstrated. In order to attain this short detection time a field programmable gate array (FPGA) is used. The studied fault detection method is implemented using a FPGA and experimentally validated for a three-phase VSI used in shunt active filter case. The proposed method tested first by ‘FPGA in the loop’ prototyping has been also validated through a fully experimental active power filter which confirms the satisfactory performances of the proposed approach. Moreover, the other feature introduced in this approach is that the control scheme and the fault-tolerant scheme are both programmed in only one FPGA.