论文信息 - Strained tunnel FETs with record ION: first demonstration of ETSOI TFETs with SiGe channel and RSD

Strained tunnel FETs with record ION: first demonstration of ETSOI TFETs with SiGe channel and RSD

We present for the first time Tunnel FETs obtained with a FDSOI CMOS process flow featuring High-K Metal Gate, ultrathin body compressively strained Si1-xGex (x from 0 to 30%) based channels, and Si0.7Ge0.3 Raised SD. We analyse the tunnelling improvements due to the different technological injection boosters: ultrathin body & EOT, strain, low band gap source, and low temperature SD anneal. For the first time, TFETs with large ON current (up to 428μA/μm) are demonstrated (with >;x1000 ION gain vs. SOI).

[1] C. Hu,et al. Si tunnel transistors with a novel silicided source and 46mV/dec swing , 2010, 2010 Symposium on VLSI Technology.

[2] S. Sedlmaier,et al. Vertical tunnel field-effect transistor , 2004, IEEE Transactions on Electron Devices.

[3] Byung-Gook Park,et al. Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec , 2007, IEEE Electron Device Letters.

[4] Qin Zhang,et al. Low-Voltage Tunnel Transistors for Beyond CMOS Logic , 2010, Proceedings of the IEEE.

[5] E. Kane. Theory of Tunneling , 1961 .

[6] X. Garros,et al. 20nm gate length trigate pFETs on strained SGOI for high performance CMOS , 2010, 2010 Symposium on VLSI Technology.

[7] R. Rooyackers,et al. Performance Enhancement in Multi Gate Tunneling Field Effect Transistors by Scaling the Fin-Width , 2010 .

[8] Adrian M. Ionescu,et al. Tunnel field-effect transistors as energy-efficient electronic switches , 2011, Nature.

[9] P. Rivallin,et al. Characterization and modeling of structural properties of SiGe/Si superlattices upon annealing , 2011 .