A pre-simulation measure of d.c. design-for-testability fault diagnosis quality

Equivalent faults inhibit fault diagnosis by producing indistinguishable test metric measurements. Removal of conditions causing the equivalence in response exhibited by such faults is necessary, if fault diagnosis quality is to be improved. As Design for-Testability (DFT) methodology aims to deliver a degree of fault diagnosis substantially greater than that obtainable testing unassisted by on-chip test specific hardware, designing a DFT scheme with minimal fault equivalence is an issue to be addressed. Presented is a set of simple and inexpensive tests, applied pre-simulation, for identifying catastrophic resistive component faults that cause numerical equivalent d.c. test model responses. Using a biquadratic notch filter modified with a novel DFT scheme, we demonstrate that equivalent fault information is a useful initial measure for assessing the potential increase in fault diagnosis quality obtainable with a DFT scheme.

[1]  Leon O. Chua,et al.  Computer-Aided Analysis Of Electronic Circuits , 1975 .

[2]  Thomas W. Williams,et al.  Design for testability of mixed signal integrated circuits , 1988, International Test Conference 1988 Proceeding@m_New Frontiers in Testing.

[3]  Abhijit Chatterjee,et al.  Fault-based automatic test generator for linear analog circuits , 1993, ICCAD.

[4]  Jr. A. Johnson Efficient fault analysis in linear analog circuits , 1979 .

[5]  Abhijit Chatterjee,et al.  Design for testability and built-in self-test of mixed-signal circuits: a tutorial , 1997, Proceedings Tenth International Conference on VLSI Design.

[6]  G.R. Spalding,et al.  Design for testability using behavioral models , 1990, 7th IEEE Conference on Instrumentation and Measurement Technology.

[7]  José Luis Huertas,et al.  Analog and mixed-signal benchmark circuits-first release , 1997, Proceedings International Test Conference 1997.

[8]  C.-J.R. Shi,et al.  Efficient DC fault simulation of nonlinear analog circuits , 1998, Proceedings Design, Automation and Test in Europe.

[9]  A. Gattiker,et al.  To DFT or not to DFT? , 1997, Proceedings International Test Conference 1997.