A New Digital Control Algorithm to Achieve Optimal Dynamic Performance in DC-to-DC Converters

In this paper, a new optimal control algorithm is proposed to achieve the best possible dynamic performance for DC-to-DC converters under load changes and input voltage changes. Using the concept of capacitor charge balance, the proposed algorithm predicts the optimal transient response for a DC-to-DC converter during the large signal load current change, or input voltage change. The equations used to calculate the optimized transient time and the optimized duty cycle series are presented. By using the proposed algorithm, the best possible transient performance, including the smallest output voltage overshoot/undershoot and the shortest recovery time, is achieved. In addition, since the large signal dynamic response of power converters is successfully predicted, the large signal stability is guaranteed. Experimental results show that the proposed method produces much better dynamic performance than a conventional current mode PID controller

[1]  D. Maksimović,et al.  DC-DC converter with fast transient response and high efficiency for low-voltage microprocessor loads , 1998, APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition.

[2]  H. Jin,et al.  Digital controller design for switchmode power converters , 1999, APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285).

[3]  Chunping Song,et al.  Accuracy analysis of hysteretic current-mode voltage regulator , 2005, Twentieth Annual IEEE Applied Power Electronics Conference and Exposition, 2005. APEC 2005..

[4]  T. Nakano,et al.  Steady-state and dynamic analysis of a buck converter using a hysteretic PWM control , 2004, 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551).

[5]  A.G. Perry,et al.  A new design method for PI-like fuzzy logic controllers for DC-to-DC converters , 2004, 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551).

[6]  Aleksandar Prodic,et al.  High-frequency digital PWM controller IC for DC-DC converters , 2003 .

[7]  J.A. Cobos,et al.  Analysis of the buck converter for scaling the supply voltage of digital circuits , 2003, Eighteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2003. APEC '03..

[8]  G. Feng,et al.  A new current mode fuzzy logic controller with extended state observer for DC-to-DC converters , 2004, Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04..

[9]  P. Zumel,et al.  Linear-Non-Linear Control Applied in Multiphase VRM , 2005, 2005 IEEE 36th Power Electronics Specialists Conference.

[10]  Miro Milanovic,et al.  FPGA implementation of digital controller for DC-DC buck converter , 2005, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05).

[11]  M. Castilla,et al.  Dynamic response optimization of quantum series-parallel resonant converters using sliding mode control , 2000, 2000 IEEE 31st Annual Power Electronics Specialists Conference. Conference Proceedings (Cat. No.00CH37018).

[12]  Seth R. Sanders,et al.  Architecture and IC implementation of a digital VRM controller , 2003 .

[13]  Jose A. Cobos,et al.  Optimum control design of PWM-buck topologies to minimize output impedance , 2002, APEC. Seventeenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.02CH37335).

[14]  T. Nakano,et al.  A new PWM control scheme using a triangle waveform modulated by output voltage , 2004, Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04..

[15]  Terukazu Sato,et al.  Analysis and optimum design of a buck-type DC-to-DC converter employing load current feedforward , 1998, PESC 98 Record. 29th Annual IEEE Power Electronics Specialists Conference (Cat. No.98CH36196).

[16]  John Y. Hung,et al.  PID controller modifications to improve steady-state performance of digital controllers for buck and boost converters , 2002, APEC. Seventeenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.02CH37335).

[17]  R. Miftakhutdinov Optimal design of interleaved synchronous buck converter at high slew-rate load current transients , 2001, 2001 IEEE 32nd Annual Power Electronics Specialists Conference (IEEE Cat. No.01CH37230).