Optimization of CNOT circuits on topological superconducting processors

We focus on optimization of the depth/size of CNOT circuits under topological connectivity constraints. We prove that any $n$-qubit CNOT circuit can be paralleled to $O(n)$ depth with $n^2$ ancillas for $2$-dimensional grid structure. For the high dimensional grid topological structure in which every quibit connects to $2\log n$ other qubits, we achieves the asymptotically optimal depth $O(\log n)$ with only $n^2$ ancillas. We also consider the synthesis without ancillas. We propose an algorithm uses at most $2n^2$ CNOT gates for arbitrary connected graph, considerably better than previous works. Experiments also confirmed the performance of our algorithm. We also designed an algorithm for dense graph, which is asymptotically optimal for regular graph. All these results can be applied to stabilizer circuits.

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