A 10-bit 3-Msample/s CMOS Multipath Multibit Cyclic ADC
暂无分享,去创建一个
Akihiro Kitagawa | Toshiro Tsukada | Tatsuji Matsuura | Eiki Imaizumi | T. Matsuura | T. Tsukada | E. Imaizumi | Akihiro Kitagawa
[1] P. Gray,et al. All-MOS charge redistribution analog-to-digital conversion techniques. I , 1975, IEEE Journal of Solid-State Circuits.
[2] D.A. Hodges,et al. All-MOS charge-redistribution analog-to-digital conversion techniques. II , 1975, IEEE Journal of Solid-State Circuits.
[3] S. H. Lewis,et al. A pipelined 5-Msample/s 9-bit analog-to-digital converter , 1987 .
[4] A. Yukawa,et al. A 12 bit 5 μsec CMOS recursive ADC with 25 mW power consumption , 1989, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference.
[5] M. F. Tompsett,et al. A 10-b 15-MHz CMOS recycling two-step A/D converter , 1990 .
[6] Kunihiko Usui,et al. A 95 mW, 10 b 15 MHz low-power CMOS ADC using analog double-sampled pipelining scheme , 1992, 1992 Symposium on VLSI Circuits Digest of Technical Papers.
[7] Stephen H. Lewis,et al. A 10-b 20-Msample/s analog-to-digital converter , 1992 .
[8] Akira Matsuzawa,et al. A 10-b 20-MHz 30-mW pipelined interpolating CMOS ADC , 1993 .
[9] D. Allstot,et al. A 85-mW, 10-bit 40-Ms/s ADC with decimated parallel architecture , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.
[10] T. Iida,et al. A 12 bit 1 MHz ACD with 1 mW power consumption , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.
[11] M. Yotsuyanagi,et al. A 1.5v Video-Speed Current-Mode Current-Tree A/d Converter , 1994, Proceedings of 1994 IEEE Symposium on VLSI Circuits.
[12] N. Kumazawa,et al. A cmos 3v 24mw 20msps 10bit A/d converter with Self Calibration Unit , 1994, Proceedings of 1994 IEEE Symposium on VLSI Circuits.
[13] Paul R. Gray,et al. A 10 b, 20 Msample/s, 35 mW pipeline A/D converter , 1995, IEEE J. Solid State Circuits.
[14] M. Yotsuyanagi,et al. A 2 V 10 b 20 MSample/s mixed-mode subranging CMOS A/D converter , 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.
[15] Masao Hotta,et al. A 10b 3MSample/s CMOS cyclic ADC , 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.
[16] M. Yotsuyanagi,et al. A 2 V, 10 b, 20 Msample/s, mixed-mode subranging CMOS A/D converter , 1995 .
[17] Bang-Sup Song,et al. A 10-b 20-Msample/s low-power CMOS ADC , 1995, IEEE J. Solid State Circuits.
[18] Hae-Seung Lee,et al. A 2.5 V 12 b 5 MSample/s pipelined CMOS ADC , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
[19] P. R. Gray,et al. A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter , 1999, IEEE J. Solid State Circuits.
[20] A 1 . 5V , 10-bit , 14 . 3-MS / s CMOS Pipeline Analog-to-Digital Converter , 1999 .