TESTING THE INTEGRITY OF THE BOUNDARY SCAN TEST INFRASTRUCTURE

An algorithrn is presented for testing tlie boiindary scan infrastmchire at board level. Using bounday scan test (BST) for board level tests means using part of the produced board's structure, the boundary scan infrastructure, to test the remainder of the same board. A design independent test sequence is proposed that detects manufacluring faulls in the BST part before using it. Special attention is paid to tlie coverage and the efficiency of the tests. A new test step is introduced that checks the connection to the TRSTpin on BST ICs.

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