High-level simulation and power modelling of mixed-signal front-ends for digital telecommunications

In this paper a methodology is described for architectural exploration of mixed-signal front-ends of transceivers for digital telecommunications. The methodology couples high-level simulations with high-level power estimators. In this way, both the performance (e.g. signal-to-noise-ratio) and the power consumption can be estimated at a high level, prior to implementation. The approach is illustrated with an architectural study of front-ends for upstream CATV modems.