A linear response single exposure CMOS image sensor with 0.5e− readout noise and 76ke− full well capacity

A linear response single exposure CMOS image sensor approaching to the photon countable sensitivity and a high full well capacity (FWC) is developed using lateral overflow integration capacitor (LOFIC) architecture with dual gain column amplifiers, small floating diffusion (FD) capacitance (C<sub>FD</sub>) and low noise in-pixel source follower (SF) signal readout technologies. The fabricated 5.5 μm pitch 360<sup>H</sup>×1680<sup>V</sup> pixel prototype image sensor exhibited 240 μV/e<sup>-</sup> conversion gain (CG) with 76 ke<sup>-</sup> FWC resulting in 0.5 e<sup>-</sup><sub>rms</sub> readout noise and 104 dB dynamic range under room temperature operation.

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